MC68HC908QL4 MC68HC908QL3 MC68HC908QL2 Data Sheet, Rev. 4
Freescale Semiconductor
133
Chapter 14
Slave LIN Interface Controller (SLIC) Module
14.1 Introduction
The slave LIN interface controller (SLIC) is designed to provide slave node connectivity on a local
interconnect network (LIN) sub-bus. LIN is an open-standard serial protocol developed for the automotive
industry to connect sensors, motors, and actuators.
The SLIC shares its pins with general-purpose input/output (I/O) port pins. See
Figure 14-1
for port
location of these shared pins.
14.2 Features
The SLIC includes these distinctive features:
Full LIN message buffering of identifier and 8 data bytes
Automatic bit rate and LIN message frame synchronization:
–
No prior programming of bit rate required, 1–20 kbps LIN bus speed operation
–
All LIN messages will be received (no message loss due to synchronization process)
–
Input clock tolerance as high as ±50%, allowing internal oscillator to remain untrimmed
–
Incoming break symbols always allowed to be 10 or more bit times without message loss
–
Supports automatic software trimming of internal oscillator using LIN synchronization data
Automatic processing and verification of LIN SYNCH BREAK and SYNCH BYTE
Automatic checksum calculation and verification with error reporting
Maximum of two interrupts per standard LIN message frame with no errors
Full LIN error checking and reporting
High-speed LIN capability up to 83.33 kbps to 120.00 kbps
(1)
Configurable digital receive filter
Streamlined interrupt servicing through use of a state vector register
Switchable UART-like byte transfer mode for processing bytes one at a time without LIN message
framing constraints
Enhanced checksum (includes ID) generation and verification
1. Maximum bit rate of SLIC module dependent upon frequency of SLIC input clock.