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參數(shù)資料
| 型號(hào)： | MC9328MX21CVKR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 90/100頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU I.MX21 266MHZ 289-MAPBGA |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | i.MX21 |
| 核心處理器： | ARM9 |
| 芯體尺寸： | 32-位 |
| 速度： | 266MHz |
| 連通性： | 1 線，EBI/EMI，I²C，IrDA，MMC，智能卡，SPI，SSI，UART/USART，USB OTG |
| 外圍設(shè)備： | DMA，I²S，LCD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 192 |
| 程序存儲(chǔ)器類型： | ROMless |
| 電壓 - 電源 (Vcc/Vdd)： | 1.45 V ~ 3.3 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 289-LFBGA |
| 包裝： | 帶卷 (TR) |
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Signal Descriptions
MC9328MX21 Technical Data, Rev. 3.4
Freescale Semiconductor
9
SLCDC2_D0
SLCD Data input signal for pass through to SLCD device. This signal is multiplexed with SSI3_FS signal
from SSI3.
Bus Master Interface (BMI)
BMI_D[15:0]
BMI bidirectional data bus. Bus width is programmable between 8-bit or 16-bit.These signals are
multiplexed with LD[15:0] and SLCDC_DAT[15:0].
BMI_CLK_CS
BMI bidirectional clock or chip select signal.This signal is multiplexed with LSCLK of LCDC.
BMI_WRITE
BMI bidirectional signal to indicate read or write access. This is an input signal when the BMI is a slave
and an output signal when BMI is the master of the interface. BMI_WRITE is asserted for write and
negated for read.This signal is muxed with LD[17] of LCDC.
BMI_READ
BMI output signal to enable data read from external slave device. This signal is not used and driven high
when BMI is slave.This signal is multiplexed with CONTRAST signal of LCDC.
BMI_READ_REQ
BMI Readrequest output signal to external bus master. This signal is active when the data in the TXFIFO
is larger or equal to the data transfer size of a single external BMI access.This signal is muxed with
LD[16] of LCDC.
BMI_RXF_FULL
BMI Receive FIFO full active high output signal to reflect if the RxFIFO reaches water mark value.This
signal is muxed with VSYNC of the LCDC.
BMI_WAIT
BMI Wait—Active low signal to wait for data ready (read cycle) or accepted (write_cycle). Also
multiplexed with VSYNC.
External DMA
EXT_DMAREQ
External DMA Request input signal. This signal is multiplexed with CSPI1_RDY.
EXT_DMAGRANT
External DMA Grant output signal. This signal is multiplexed with LD[16] of LCDC and CSPI1_SS1 of
CSPI1.
NAND Flash Controller
NF_CLE
NAND Flash Command Latch Enable output signal. Multiplexed with PC_POE of PCMCIA.
NF_CE
NAND Flash Chip Enable output signal. This signal is multiplexed with PC_CE1 of PCMCIA.
NF_WP
NAND Flash Write Protect output signal. This signal is multiplexed with PC_CE2 of PCMCIA.
NF_ALE
NAND Flash Address Latch Enable output signal. This signal is multiplexed with PC_OE of PCMCIA.
NF_RE
NAND Flash Read Enable output signal. This signal is multiplexed with PC_RW of PCMCIA.
NF_WE
NAND Flash Write Enable output signal. This signal is multiplexed with and PC_BVD2 of PCMCIA.
NF_RB
NAND Flash Ready Busy input signal. This signal is multiplexed with PC_RST of PCMCIA.
NF_IO[15:0]
NAND Flash Data input and output signals. NF_IO[15:7] signals are multiplexed with A[25:21] and
A[15:13]. NF_IO[7:0] signals are multiplexed with several PCMCIA signals.
PCMCIA Controller
PC_A[25:0]
PCMCIA Address signals. These signals are multiplexed with A[25:0].
PC_D[15:0]
PCMCIA Data input and output signals. These signals are multiplexed with D[15:0].
PC_CD1
PCMCIA Card Detect1 input signal. This signal is multiplexed with NFIO[7] signal of NF.
PC_CD2
PCMCIA Card Detect2 input signal. This signal is multiplexed with NFIO[6] signal of NF.
PC_WAIT
PCMCIA Wait input signal to extend current access. This signal is multiplexed with NFIO[5] signal of NF.
PC_READY
PCMCIA Ready input signal indicates card is ready for access. Multiplexed with NFIO[4] signal of NF.
Table 2. i.MX21 Signal Descriptions (Continued)
Signal Name
Function/Notes
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC9328MX21SCVKR2 | IC MCU I.MX21 266MHZ 289-MAPBGA |
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| MC9328MXSCVP10 | IC MCU I.MXS 100MHZ 225-MAPBGA |
| MC9RS08KA1CDBR | IC CPU RS08 1K FLASH 62RAM 6-DFN |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC9328MX21CVM | 功能描述:處理器 - 專門應(yīng)用 DB I.MX21 17X17 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MC9328MX21CVM | 制造商:Freescale Semiconductor 功能描述:Microprocessor |
| MC9328MX21CVMR2 | 功能描述:處理器 - 專門應(yīng)用 DB I.MX21 17X17 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MC9328MX21DVG | 制造商:Rochester Electronics LLC 功能描述:DB I.MX21 - Bulk 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述: |
| MC9328MX21DVGR2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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