參數(shù)資料
型號： MC9328MX21SVM
廠商： Freescale Semiconductor
文件頁數(shù)： 12/88頁
文件大?。?/td> 0K
描述： IC MPU I.MX21S 289-MAPBGA
標(biāo)準(zhǔn)包裝： 90
系列： i.MX21
核心處理器： ARM9
芯體尺寸： 32-位
速度： 266MHz
連通性： 1 線，EBI/EMI，I²C，IrDA，MMC，智能卡，SPI，SSI，UART/USART，USB OTG
外圍設(shè)備： DMA，I²S，LCD，POR，PWM，WDT
輸入/輸出數(shù)： 192
程序存儲器類型： ROMless
電壓 - 電源 (Vcc/Vdd)： 1.45 V ~ 3.3 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 289-LFBGA
包裝： 托盤
MC9328MX21S Technical Data, Rev. 1.3
2
Freescale Semiconductor
Introduction
devices to be used as primary or secondary non-volatile storage. The on-chip error correction code (ECC)
and parity checking circuitry of the NAND Flash controller frees the CPU for other tasks. WLAN,
Bluetooth and expansion options are provided through PCMCIA/CF, USB, and MMC/SD host controllers.
The device is packaged in a 289-pin MAPBGA.
Figure 1. i.MX21S Functional Block Diagram
1.1
Conventions
This document uses the following conventions:
OVERBAR is used to indicate a signal that is active when pulled low: for example, RESET.
Logic level one is a voltage that corresponds to Boolean true (1) state.
Logic level zero is a voltage that corresponds to Boolean false (0) state.
To set a bit or bits means to establish logic level one.
To clear a bit or bits means to establish logic level zero.
A signal is an electronic construct whose state conveys or changes in state convey information.
A pin is an external physical connection. The same pin can be used to connect a number of signals.
Asserted means that a discrete signal is in active logic state.
— Active low signals change from logic level one to logic level zero.
— Active high signals change from logic level zero to logic level one.
Negated means that an asserted discrete signal changes logic state.
— Active low signals change from logic level zero to logic level one.
— Active high signals change from logic level one to logic level zero.
Connectivity
ARM9 Platform
System Control
Standard System I/O
ARM926EJ-S
Internal Control
I
2C
UART 1, 3, & 4
1-Wire
FIRI
USB OTG/ 1 Host
i.MX21S
CSPI x 2
Audio Mux
SSI x 2
JTAG/Multi- ICE
Timers x 3
WDOG
RTC
DMAC
GPIO
PWM
D Cache
I Cache
MAX
MMU
Bus Control
Memory Control
Memory Interface
SDRAMC
Memory Expansion
MMC/SD x 2
PCMCIA/CF
Human Interface
Clock Management
System Boot
WEIM
NFC
SLCD Controller
Keypad
LCD Controller
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
i.MX21
Product
Family
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