參數(shù)資料
型號(hào): MC9S08AC15MFDE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類(lèi): 微控制器/微處理器
英文描述: 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, QCC48
封裝: 7 X 7 MM, 1 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, MO-220VKKD-2, TQFN-48
文件頁(yè)數(shù): 18/337頁(yè)
文件大?。?/td> 3100K
代理商: MC9S08AC15MFDE
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Chapter 7 Central Processor Unit (S08CPUV2)
MC9S08AC16 Series Data Sheet, Rev. 9
114
Freescale Semiconductor
7.4.3
Wait Mode Operation
The WAIT instruction enables interrupts by clearing the I bit in the CCR. It then halts the clocks to the
CPU to reduce overall power consumption while the CPU is waiting for the interrupt or reset event that
will wake the CPU from wait mode. When an interrupt or reset event occurs, the CPU clocks will resume
and the interrupt or reset event will be processed normally.
If a serial BACKGROUND command is issued to the MCU through the background debug interface while
the CPU is in wait mode, CPU clocks will resume and the CPU will enter active background mode where
other serial background commands can be processed. This ensures that a host development system can still
gain access to a target MCU even if it is in wait mode.
7.4.4
Stop Mode Operation
Usually, all system clocks, including the crystal oscillator (when used), are halted during stop mode to
minimize power consumption. In such systems, external circuitry is needed to control the time spent in
stop mode and to issue a signal to wake up the target MCU when it is time to resume processing. Unlike
the earlier M68HC05 and M68HC08 MCUs, the HCS08 can be configured to keep a minimum set of
clocks running in stop mode. This optionally allows an internal periodic signal to wake the target MCU
from stop mode.
When a host debug system is connected to the background debug pin (BKGD) and the ENBDM control
bit has been set by a serial command through the background interface (or because the MCU was reset into
active background mode), the oscillator is forced to remain active when the MCU enters stop mode. In this
case, if a serial BACKGROUND command is issued to the MCU through the background debug interface
while the CPU is in stop mode, CPU clocks will resume and the CPU will enter active background mode
where other serial background commands can be processed. This ensures that a host development system
can still gain access to a target MCU even if it is in stop mode.
Recovery from stop mode depends on the particular HCS08 and whether the oscillator was stopped in stop
mode. Refer to the Modes of Operation chapter for more details.
7.4.5
BGND Instruction
The BGND instruction is new to the HCS08 compared to the M68HC08. BGND would not be used in
normal user programs because it forces the CPU to stop processing user instructions and enter the active
background mode. The only way to resume execution of the user program is through reset or by a host
debug system issuing a GO, TRACE1, or TAGGO serial command through the background debug
interface.
Software-based breakpoints can be set by replacing an opcode at the desired breakpoint address with the
BGND opcode. When the program reaches this breakpoint address, the CPU is forced to active
background mode rather than continuing the user program.
相關(guān)PDF資料
PDF描述
MC9S08AC8VFGE 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP44
MC9S08DN60VLH 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP64
MC9S08DN32CLC 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP32
MC9S08DN32MLF 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP48
MC9S08DN16MLC 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC9S08AC16 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:MC9S08AC16 Series Data Sheet
MC9S08AC16_08 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:8-Bit HCS08 Central Processor Unit (CPU)
MC9S08AC16_09 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:HCS08 Microcontrollers
MC9S08AC16_0911 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:HCS08 Microcontrollers
MC9S08AC16C32E 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:8-Bit HCS08 Central Processor Unit (CPU)