參數(shù)資料
型號: MC9S12B128VPV25
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP112
封裝: LQFP-112
文件頁數(shù): 23/132頁
文件大?。?/td> 1842K
代理商: MC9S12B128VPV25
Device User Guide —9S12B128DGV1/D V01.13
119
A.7 SPI
This section provides electrical parametrics and ratings for the SPI.
In Table A-23 the measurement conditions are listed.
A.7.1 Master Mode
In Figure A-7 the timing diagram for master mode with transmission format CPHA=0 is depicted.
Figure A-7 SPI Master Timing (CPHA=0)
In Figure A-8 the timing diagram for master mode with transmission format CPHA=1 is depicted.
Table A-23 Measurement Conditions
Description
Value
Unit
Drive mode
full drive mode
Load capacitance CLOAD,
on all outputs
50
pF
Thresholds for delay
measurement points
(20% / 80%) VDDX
V
SCK
(OUTPUT)
SCK
(OUTPUT)
MISO
(INPUT)
MOSI
(OUTPUT)
SS1
(OUTPUT)
1
9
5
6
MSB IN2
BIT 6 . . . 1
LSB IN
MSB OUT2
LSB OUT
BIT 6 . . . 1
11
4
2
10
(CPOL
= 0)
(CPOL
= 1)
3
13
1.if configured as an output.
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
12
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