參數(shù)資料
型號(hào): MC9S12B64MPV16
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP112
封裝: LQFP-112
文件頁數(shù): 82/132頁
文件大?。?/td> 1842K
代理商: MC9S12B64MPV16
Device User Guide —9S12B128DGV1/D V01.13
53
2.2 Detailed Signal Descriptions
2.2.1 EXTAL, XTAL — Oscillator Pins
EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived
from the EXTAL input frequency. XTAL is the crystal output.
PK7
ECS
ROMCTL
VDDX
PUCR/
PUPKE
Up
Port K I/O, Emulation Chip Select,
ROM On Enable
PK[5:0]
XADDR[19:14]
Port K I/O, Extended Addresses
PM7
PERM/
PPSM
Disabled
Port M I/O
PM6
Port M I/O
PM5
SCK
Port M I/O, SCK of SPI0
PM4
MOSI
Port M I/O, MOSI of SPI0
PM3
SS0
Port M I/O, SS of SPI0
PM2
MISO0
Port M I/O, MISO of SPI0
PM1
TXCAN0
Port M I/O, TX of CAN0
PM0
RXCAN0
Port M I/O, RX of CAN0
PP7
KWP7
PWM7
PERP/
PPSP
Port P I/O, Interrupt, Channel 7 of
PWM
PP6
KWP6
PWM6
Port P I/O, Interrupt, PWM Channel
6
PP5
KWP5
PWM5
Port P I/O, Interrupt, PWM Channel 5
PP4
KWP4
PWM4
Port P I/O, Interrupt, PWM Channel 4
PP3
KWP3
PWM3
Port P I/O, Interrupt, PWM Channel 3
PP2
KWP2
PWM2
Port P I/O, Interrupt, PWM Channel 2
PP1
KWP1
PWM1
Port P I/O, Interrupt, PWM Channel 1
PP0
KWP0
PWM0
Port P I/O, Interrupt, PWM Channel 0
PS7
SS0
PERS/
PPSS
Up
Port S I/O, SS of SPI0
PS6
SCK0
Port S I/O, SCK of SPI0
PS5
MOSI0
Port S I/O, MOSI of SPI0
PS4
MISO0
Port S I/O, MISO of SPI0
PS3
TXD1
Port S I/O, TXD of SCI1
PS2
RXD1
Port S I/O, RXD of SCI1
PS1
TXD0
Port S I/O, TXD of SCI0
PS0
RXD0
Port S I/O, RXD of SCI0
PT[7:0]
IOC[7:0]
PERT/
PPST
Disabled Port T I/O, Timer channels
NOTES:
1. Refer to PEAR register description in HCS12 Multiplexed External Bus Interface (MEBI) Block Guide.
Pin Name
Function1
Pin Name
Function2
Pin Name
Function
3
Pin Name
Function
4
Powered
by
Internal Pull
Resistor
Description
CTRL
Reset
State
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