參數(shù)資料
型號: MC9S12C32PMFA25
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP48
封裝: PLASTIC, LQFP-48
文件頁數(shù): 65/116頁
文件大?。?/td> 1882K
代理商: MC9S12C32PMFA25
Device User Guide — 9S12C32DGV1/D V01.14
Table 2-2 MC9S12C32 Power and Ground Connection Summary
NOTE:All VSS pins must be connected together in the application. Because fast signal transitions
place high, short-duration current demands on the power supply, use bypass capacitors with
high-frequency characteristics and place them as close to the MCU as possible. Bypass requirements
depend on MCU pin load.
Section 3 System Clock Description
The Clock and Reset Generator provides the internal clock signals for the core and all peripheral modules.
Figure 3-1 shows the clock connections from the CRG to all modules. Consult the CRG Block User
Guide for details on clock generation.
Mnemonic
Nominal
Voltage
Description
VDD1
VDD2
2.5 V
Internal power and ground generated by internal regulator. These also
allow an external source to supply the core VDD/VSS voltages and bypass
the internal voltage regulator.
In the 48 and 52 LQFP packages VDD2 and VSS2 are not available.
VSS1
VSS2
0V
VDDR
5.0 V
External power and ground, supply to internal voltage regulator.
VSSR
0 V
VDDX
5.0 V
External power and ground, supply to pin drivers.
VSSX
0 V
VDDA
5.0 V
Operating voltage and ground for the analog-to-digital converters and the
reference for the internal voltage regulator, allows the supply voltage to the
A/D to be bypassed independently.
VSSA
0 V
VRH
5.0 V
Reference voltage low for the ATD converter.
In the 48 and 52 LQFP packages VRL is bonded to VSSA.
VRL
0 V
VDDPLL
2.5 V
Provides operating voltage and ground for the Phased-Locked Loop. This
allows the supply voltage to the PLL to be bypassed independently.
Internal power and ground generated by internal regulator.
VSSPLL
0 V
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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