參數(shù)資料
型號: MC9S12C32PMFA25
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP48
封裝: PLASTIC, LQFP-48
文件頁數(shù): 98/116頁
文件大?。?/td> 1882K
代理商: MC9S12C32PMFA25
Device User Guide — 9S12C32DGV1/D V01.14
B.2 Chip Power-up and LVI/LVR graphical explanation
B.2.0.1 POR
The release level VPORR and the assert level VPORA are derived from the VDD Supply. They are also valid
if the device is powered externally. After releasing the POR reset the oscillator and the clock quality check
are started. If after a time tCQOUT no valid oscillation is detected, the MCU will start using the internal self
clock. The fastest startup time possible is given by nuposc.
B.2.0.2 LVR
The release level VLVRR and the assert level VLVRA are derived from the VDD Supply. They are also valid
if the device is powered externally. After releasing the LVR reset the oscillator and the clock quality check
are started. If after a time tCQOUT no valid oscillation is detected, the MCU will start using the internal self
clock. The fastest startup time possible is given by nuposc.
Voltage regulator sub modules LVI (low voltage interrupt), POR (power-on reset) and LVR (low voltage
reset) handle chip power-up or drops of the supply voltage. Their function is described in Figure B-1.
Figure B-1 Voltage Regulator - Chip Power-up and Voltage Drops (not scaled)
VLVID
VLVIA
VLVRD
VLVRA
VPORD
LVI
POR
LVR
t
V
VDDA
VDD
LVI enabled
LVI disabled due to LVR
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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