參數(shù)資料
型號(hào)： MC9S12DB128B
廠商： Motorola, Inc.
英文描述： MC9S12DT128B
中文描述： MC9S12DT128B
文件頁數(shù)： 67/124頁
文件大小： 577K
代理商： MC9S12DB128B
MC9S12DT128B Device User Guide — V01.07
67
Section 4 Modes of Operation
4.1 Overview
Eight possible modes determine the operating configuration of the MC9S12DT128B. Each mode has an
associated default memory map and external bus configuration controlled by a further pin.
Three low power modes exist for the device.
4.2 Chip Configuration Summary
TheoperatingmodeoutofresetisdeterminedbythestatesoftheMODC,MODB,andMODApinsduring
reset(
Table 4-1
).TheMODC,MODB,andMODAbitsintheMODEregistershowthecurrentoperating
modeandprovidelimitedmodeswitchingduringoperation.ThestatesoftheMODC,MODB,andMODA
pinsarelatchedintothesebitsontherisingedgeoftheresetsignal.TheROMCTLsignalallowsthesetting
of the ROMON bit in the MISC register thus controlling whether the internal Flash is visible in the
memory map. ROMON = 1 mean the Flash is visible in the memory map. The state of the ROMCTL pin
is latched into the ROMON bit in the MISC register on the rising edge of the reset signal.
For further explanation on the modes refer to the Core User Guide.
Table 4-1 Mode Selection
BKGD =
MODC
PE6 =
MODB
PE5 =
MODA
PK7 =
ROMCTL
ROMON
Bit
Mode Description
0
0
0
X
1
Special Single Chip, BDM allowed and ACTIVE. BDM is
allowed in all other modes but a serial command is
required to make BDM active.
Emulation Expanded Narrow, BDM allowed
Special Test (Expanded Wide), BDM allowed
Emulation Expanded Wide, BDM allowed
Normal Single Chip, BDM allowed
0
0
0
1
0
1
1
0
1
0
1
0
X
X
X
X
0
1
0
0
0
1
0
1
1
0
1
Normal Expanded Narrow, BDM allowed
1
1
0
X
1
Special Peripheral; BDM allowed but bus operations
would cause bus conflicts (must not be used)
1
1
1
0
1
0
1
Normal Expanded Wide, BDM allowed
Table 4-2 Clock Selection Based on PE7
PE7 = XCLKS
1
0
Description
Colpitts Oscillator selected
Pierce Oscillator/external clock selected
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