
Chapter 20 S12X Debug (S12XDBGV3) Module
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
755
20.3.2.4
Debug Control Register2 (DBGC2)
Read: Anytime
Write: Anytime the module is disarmed.
This register congures the comparators for range matching.
Address: 0x0023
76543210
R
0000
CDCM
ABCM
W
Reset
00000000
= Unimplemented or Reserved
Figure 20-6. Debug Control Register2 (DBGC2)
Table 20-13. DBGC2 Field Descriptions
Field
Description
3–2
CDCM[1:0]
C and D Comparator Match Control — These bits determine the C and D comparator match mapping as
1–0
ABCM[1:0]
A and B Comparator Match Control — These bits determine the A and B comparator match mapping as
Table 20-14. CDCM Encoding
CDCM
Description
00
Match2 mapped to comparator C match....... Match3 mapped to comparator D match.
01
Match2 mapped to comparator C/D inside range....... Match3 disabled.
10
Match2 mapped to comparator C/D outside range....... Match3 disabled.
11
Reserved
Table 20-15. ABCM Encoding
ABCM
Description
00
Match0 mapped to comparator A match....... Match1 mapped to comparator B match.
01
Match 0 mapped to comparator A/B inside range....... Match1 disabled.
10
Match 0 mapped to comparator A/B outside range....... Match1 disabled.
11
Reserved