Debug Support
Freescale Semiconductor
30-33
Command Sequence:
Figure 30-34. RCREG Command Sequence
Operand Data:
The only operand is the 32-bit Rc control register select field.
Result Data:
Control register contents are returned as a longword, most-significant word first.
The implemented portion of registers smaller than 32 bits is guaranteed correct;
other bits are undefined.
BDM Accesses of the Stack Pointer Registers (A7: SSP, USP)
The processor’s Version 2 ColdFire core supports two unique stack pointer (A7) registers: the supervisor
stack pointer (SSP) and the user stack pointer (USP). The hardware implementation of these two
programmable-visible 32-bit registers does not uniquely identify one as the SSP and the other as the USP.
Rather, the hardware uses one 32-bit register as the currently-active A7 and the other register is named
simply the “other_A7”. Thus, the contents of the two hardware registers is a function of the operating mode
of the processor:
if SR[S] = 1
then
A7 = Supervisor Stack Pointer
other_A7 = User Stack Pointer
else
A7 = User Stack Pointer
other_A7 = Supervisor Stack Pointer
The BDM programming model supports reads and writes to the A7 and other_A7 registers directly. It is
the responsibility of the external development system to determine the mapping of the two hardware
registers (A7, other_A7) to the two program-visible definitions (supervisor and user stack pointers), based
on the Supervisor bit of the status register.
BDM Accesses of the EMAC Registers
The presence of rounding logic in the output datapath of the EMAC requires that special care be taken
during any BDM-initiated reads and writes of its programming model. In particular, it is necessary that any
result rounding modes be disabled during the read/write process so the exact bit-wise contents of the
EMAC registers are accessed.
As an example, any BDM read of an accumulator register (ACCn) must be preceded by two commands
accessing the MAC status register. Specifically, the following BDM sequence is required:
BdmReadACCn (
rcreg
macsr;
// read macsr contents & save
wcreg
#0,macsr;
// disable all rounding modes
XXX
’NOT READY’
RCREG
???
MS ADDR
’NOT READY’
MS ADDR
’NOT READY’
NEXT CMD
’NOT READY’
READ
CONTROL
REGISTER
XXX
BERR
NEXT CMD
MS RESULT
NEXT CMD
LS RESULT
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3