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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | MCF5373LCVM240 |
| 寤犲晢锛� | Freescale Semiconductor |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 5/46闋�(y猫) |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC MCU 32BIT 240MHZ 196-MAPBGA |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 126 |
| 绯诲垪锛� | MCF537x |
| 鏍稿績铏曠悊鍣細 | Coldfire V3 |
| 鑺珨灏哄锛� | 32-浣� |
| 閫熷害锛� | 240MHz |
| 閫ｉ€氭€э細 | EBI/EMI锛屼互澶恫(w菐ng)锛孖²C锛孲PI锛孲SI锛孶ART/USART锛孶SB锛孶SB OTG |
| 澶栧湇瑷�(sh猫)鍌欙細 | DMA锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 62 |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 | ROMless |
| RAM 瀹归噺锛� | 32K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.4 V ~ 3.6 V |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 196-LBGA |
| 鍖呰锛� | 鎵樼洡 |
绗�1闋�(y猫)绗�2闋�(y猫)绗�3闋�(y猫)绗�4闋�(y猫)鐣�(d膩ng)鍓嶇5闋�(y猫)绗�6闋�(y猫)绗�7闋�(y猫)绗�8闋�(y猫)绗�9闋�(y猫)绗�10闋�(y猫)绗�11闋�(y猫)绗�12闋�(y猫)绗�13闋�(y猫)绗�14闋�(y猫)绗�15闋�(y猫)绗�16闋�(y猫)绗�17闋�(y猫)绗�18闋�(y猫)绗�19闋�(y猫)绗�20闋�(y猫)绗�21闋�(y猫)绗�22闋�(y猫)绗�23闋�(y猫)绗�24闋�(y猫)绗�25闋�(y猫)绗�26闋�(y猫)绗�27闋�(y猫)绗�28闋�(y猫)绗�29闋�(y猫)绗�30闋�(y猫)绗�31闋�(y猫)绗�32闋�(y猫)绗�33闋�(y猫)绗�34闋�(y猫)绗�35闋�(y猫)绗�36闋�(y猫)绗�37闋�(y猫)绗�38闋�(y猫)绗�39闋�(y猫)绗�40闋�(y猫)绗�41闋�(y猫)绗�42闋�(y猫)绗�43闋�(y猫)绗�44闋�(y猫)绗�45闋�(y猫)绗�46闋�(y猫)
Pin Assignments and Reset States
MCF537x ColdFire Microprocessor Data Sheet, Rev. 4
Freescale Semiconductor
13
4.3
Pinout鈥�160 QFP
The pinout for the MCF5372CAB180 and MCF5373CAB180 packages is shown below.
Figure 5. MCF5372CAB180 and MCF5373CAB180 Pinout Top View (160 QFP)
EVDD
VSS
FEC_TXD2
FEC_TXD3
IV
DD
FEC_TXER
FEC_TXEN
FEC_TXCLK
FEC_RXE
R
FEC_RXD0
FEC_RXD1
FEC_RXD2
FEC_RXD3
FEC_RXDV
FEC_RXCLK
FEC_CRS
FEC_COL
U1CTS
U1RTS
U1TXD
U1RXD
EVDD
VSS
SD_V
D
FB_CS0
FB_CS1
A
2
3/
F
B
_C
S
5
A
2
2/
F
B
_C
S
4
A21
A20
A19
A18
A17
A16
A15
IV
DD
TEST
A14
VSS
SD_V
D
16
0
15
9
15
8
15
7
15
6
15
5
15
4
15
3
15
2
15
1
15
0
14
9
14
8
14
7
14
6
14
5
14
4
14
3
14
2
14
1
14
0
13
9
13
8
13
7
13
6
13
5
13
4
13
3
13
2
13
1
13
0
12
9
12
8
12
7
12
6
12
5
12
4
12
3
12
2
12
1
FEC_TXD1
1
120
A13
FEC_TXD0
2
119
A12
FEC_MDIO
3
118
A11
FEC_MDC
4
117
A10
DT0IN
5
116
A9
DT1IN
6
115
A8
DT2IN
7
114
A7
DT3IN
8
113
A6
EVDD
9
112
A5
VSS
10
111
A4
SD_VDD
11
110
A3
TS
12
109
A2
SD_WE
13
108
A1
SD_CKE
14
107
A0
SD_CS0
15
106
TA
D15
16
105
SD_VDD
D14
17
104
VSS
D13
18
103
EVDD
D12
19
102
IRQ7
D11
20
101
IRQ4
D10
21
100
IRQ1
D9
22
99
PLL_VDD
D8
23
98
PLL_VSS
BE/BWE1
24
97
IVDD
SD_DQS1/3
25
96
JTAG_EN
BE/BWE3
26
95
RESET
D31
27
94
EVDD
D30
28
93
XTAL
D29
29
92
DRAMSEL
D28
30
91
EXTAL
D27
31
90
TDI/DSI
D26
32
89
VSS
D25
33
88
TRST/DSCLK
D24
34
87
TMS/BKPT
SD_DR_DQS
35
86
RSTOUT
IVDD
36
85
U0CTS
SD_CLK
37
84
U0RTS
SD_CLK
38
83
U0TXD
SD_VDD
39
82
VSS
FB_CLK
40
81
EVDD
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
SD
_V
D
VS
S
SD_A1
0
SD_CA
S
SD_RA
S
D2
3
D2
2
D2
1
D2
0
D1
9
D1
8
D1
7
D1
6
BE/
BWE
2
SD_DQS
0/
2
BE/
BWE
0
D7
D6
D5
D4
D3
D2
D1
D0
R/W
OE
SD
_V
D
VS
S
EV
D
TCLK/PST
CL
K
EV
D
RCON
A
LL_P
ST
TDO/
DSO
QSP
I_DI
N
QS
PI
_DOUT
QSP
I_CL
K
Q
S
PI
_
C
S2
IV
DD
U0
R
X
D
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MCF53721CVM240,
MCF5372LCVM240,
MCF5373LCVM240
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| MCF5373LCVM240J | 鍔熻兘鎻忚堪:32浣嶅井鎺у埗鍣� - MCU V3CORE RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:C28x 铏曠悊鍣ㄧ郴鍒�:TMS320F28x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:90 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:64 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:26 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2.97 V to 3.63 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:LQFP-80 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| MCF5407 | 鍒堕€犲晢:FREESCALE 鍒堕€犲晢鍏ㄧū:Freescale Semiconductor, Inc 鍔熻兘鎻忚堪:CodeWarrior Development Studio for ColdFire銏� Architectures |
| MCF5407AI162 | 鍔熻兘鎻忚堪:寰檿鐞嗗櫒 - MPU MCF5407 V4CORE 4KSRAM RoHS:鍚� 鍒堕€犲晢:Atmel 铏曠悊鍣ㄧ郴鍒�:SAMA5D31 鏍稿績:ARM Cortex A5 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:536 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:32 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鎺ュ彛椤炲瀷:CAN, Ethernet, LIN, SPI,TWI, UART, USB 宸ヤ綔闆绘簮闆诲:1.8 V to 3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-324 |
| MCF5407AI220 | 鍔熻兘鎻忚堪:寰檿鐞嗗櫒 - MPU MCF5407 V4CORE 4KSRAM RoHS:鍚� 鍒堕€犲晢:Atmel 铏曠悊鍣ㄧ郴鍒�:SAMA5D31 鏍稿績:ARM Cortex A5 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:536 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:32 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鎺ュ彛椤炲瀷:CAN, Ethernet, LIN, SPI,TWI, UART, USB 宸ヤ綔闆绘簮闆诲:1.8 V to 3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-324 |
| MCF5407CAI162 | 鍔熻兘鎻忚堪:寰檿鐞嗗櫒 - MPU MCF5407 V4CORE 4KSRAM RoHS:鍚� 鍒堕€犲晢:Atmel 铏曠悊鍣ㄧ郴鍒�:SAMA5D31 鏍稿績:ARM Cortex A5 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:536 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:32 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鎺ュ彛椤炲瀷:CAN, Ethernet, LIN, SPI,TWI, UART, USB 宸ヤ綔闆绘簮闆诲:1.8 V to 3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-324 |
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