參數(shù)資料
型號： MCHC11F1CFNE2
廠商： Freescale Semiconductor
文件頁數(shù)： 121/158頁
文件大小： 0K
描述： IC MCU 512 EEPROM 68-PLCC
標(biāo)準(zhǔn)包裝： 18
系列： HC11
核心處理器： HC11
芯體尺寸： 8-位
速度： 2MHz
連通性： SCI，SPI
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 30
程序存儲器類型： ROMless
EEPROM 大?。?/td> 512 x 8
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 68-LCC（J 形引線）
包裝： 管件
RESETS AND INTERRUPTS
TECHNICAL DATA
5-3
Semiconductor wafer processing causes variations of the RC time-out values between
individual devices. An E-clock frequency below 10 kHz is detected as a clock monitor
error. An E-clock frequency of 200 kHz or more prevents clock monitor errors. Using
the clock monitor function when the E-clock is below 200 kHz is not recommended.
Special considerations are needed when a STOP instruction is executed and the clock
monitor is enabled. Because the STOP function causes the clocks to be halted, the
clock monitor function generates a reset sequence if it is enabled at the time the STOP
mode was initiated. Before executing a STOP instruction, clear to zero the CME bit in
the OPTION register to disable the clock monitor. After recovery from STOP, set the
CME bit to logic one to enable the clock monitor.
5.1.5 OPTION Register
*Can be written only once in first 64 cycles out of reset in normal modes, or at any time in special modes.
ADPU — Analog-to-Digital Converter Power-Up
CSEL — Clock Select
IRQE — Configure IRQ for Edge-Sensitive Only Operation
0 = Low level sensitive operation.
1 = Falling edge sensitive only operation.
DLY — Enable Oscillator Start-up Delay
0 = The oscillator start-up delay coming out of STOP is bypassed and the MCU re-
sumes processing within about four bus cycles.
1 = A delay of approximately 4000 E-clock cycles is imposed as the MCU is started
up from the STOP power-saving mode.
CME — Clock Monitor Enable
This control bit can be read or written at any time and controls whether or not the in-
ternal clock monitor circuit triggers a reset sequence when the system clock is slow or
absent. When it is clear, the clock monitor circuit is disabled, and when it is set, the
clock monitor circuit is enabled. Reset clears the CME bit.
FCME — Force Clock Monitor Enable
To use STOP mode, the FCME bit must equal zero.
0 = Clock monitor follows the state of the CME bit.
1 = Clock monitor circuit is enabled until next reset
OPTION — System Configuration Options
$1039
Bit 7
654321
Bit 0
ADPU
CSEL
IRQE*
DLY*
CME
FCME*
CR1*
CR0*
RESET:
0001000
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCHC11F1CFNE2 制造商:Freescale Semiconductor 功能描述:8-Bit Microcontroller IC
MCHC11F1CFNE2R 功能描述:8位微控制器 -MCU 8B MCU 1KRAM 512EE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MCHC11F1CFNE3 功能描述:8位微控制器 -MCU 8B MCU 1KRAM 512EE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MCHC11F1CFNE3 制造商:Freescale Semiconductor 功能描述:8-Bit Microcontroller IC
MCHC11F1CFNE3R 功能描述:8位微控制器 -MCU 8B MCU 1KRAM 512EE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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