參數(shù)資料
型號(hào)： MCHC11F1CFNE5
廠商： Freescale Semiconductor
文件頁數(shù)： 80/158頁
文件大?。?/td> 0K
描述： MCU 8BIT 1KRAM 512EE 68-PLCC
標(biāo)準(zhǔn)包裝： 18
系列： HC11
核心處理器： HC11
芯體尺寸： 8-位
速度： 5MHz
連通性： SCI，SPI
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 30
程序存儲(chǔ)器類型： ROMless
EEPROM 大?。?/td> 512 x 8
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 68-LCC（J 形引線）
包裝： 管件
CENTRAL PROCESSING UNIT
MC68HC11F1
3-4
TECHNICAL DATA
Figure 3-2 Stacking Operations
When a subroutine is called by a jump to subroutine (JSR) or branch to subroutine
(BSR) instruction, the address of the instruction after the JSR or BSR is automatically
pushed onto the stack, least significant byte first. When the subroutine is finished, a
return from subroutine (RTS) instruction is executed. The RTS pulls the previously
stacked return address from the stack, and loads it into the program counter. Execu-
tion then continues at this recovered return address.
SP-9
STACK
SP-1
ACMLTR A
ACMLTR B
CONDITION CODE
SP-2
SP-3
SP-4
SP-5
SP-6
SP-7
SP-8
INDEX REGISTER (YL)
INDEX REGISTER (YH)
INDEX REGISTER (XL)
INDEX REGISTER (XH)
RTNH
RTNL
STACK
SP-2
SP-1
SP
RTNH
RTNL
STACK
SP-2
SP-1
SP
RTNH
RTNL
$9D = JSR
dd
NEXT MAIN INSTR
DIRECT
MAIN PROGRAM
$AD = JSR
ff
NEXT MAIN INSTR
INDXD,X
MAIN PROGRAM
PC
RTN
PC
RTN
$18 = PRE
ff
NEXT MAIN INSTR
INDXD,Y
MAIN PROGRAM
PC
RTN
$AD = JSR
$BD = JSR
ll
NEXT MAIN INSTR
EXTEND
MAIN PROGRAM
PC
RTN
hh
$8D = BSR
rr
NEXT MAIN INSTR
MAIN PROGRAM
$39 = RTS
SUBROUTINE
PC
RTN
PC
BSR, BRANCH TO SUBROUTINE
STACK
SP
SP+1
SP+2
RTS, RETURN FROM SUBROUTINE
$3F = SWI
MAIN PROGRAM
PC
SWI, SOFTWARE INTERRUPT
RTN
$3E = WAI
MAIN PROGRAM
PC
WAI, WAIT FOR INTERRUPT
RTN
$3B = RTI
INTERRUPT PROGRAM
PC
STACK
SP+1
SP
RTI, RETURN FROM INTERRUPT
ACMLTR A
ACMLTR B
CONDITION CODE
SP+2
SP+3
SP+4
SP+5
SP+6
SP+7
SP+8
SP+9
LEGEND:
RTN
RTNH
RTNL
dd
ff
hh
ll
rr
Address of next instruction in main program to be
executed upon return from subroutine.
Most significant byte of return address.
Least significant byte of return address.
8-bit direct address ($0000-$00FF) (high byte
assumed to be $00).
8-bit positive offset $00 (0) to $FF (256) is added
to index.
High-order byte of 16-bit extended address.
Low-order byte of 16-bit extended address.
Signed-relative offset $80 (-128) to $7F (+127)
(offset relative to the address following the
machine code offset byte).
JSR, JUMP TO SUBROUTINE
Shaded cells show stack pointer position after
operation is complete.
RTNH
RTNL
INDEX REGISTER (YL)
INDEX REGISTER (YH)
INDEX REGISTER (XL)
INDEX REGISTER (XH)
RTNH
RTNL
SP
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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