參數(shù)資料
型號(hào): MCIMX253CJM4
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA400
封裝: 17 X 17 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-400
文件頁數(shù): 65/154頁
文件大?。?/td> 1498K
代理商: MCIMX253CJM4
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
18
Freescale Semiconductor
5. Turn on all other analog power supplies including USBPHY1_VDDA_BIAS,
USBPHY1_UPLL_VDD, USBPHY1_VDDA, USBPHY2_VDD, NVCC_ADC,
OSC24M_VDD, MPPLL_VDD, UPLL_VDD and FUSEVDD no less than 1ms and no greater
than 32 ms after QVDD reaches 90% of 1.2V. FUSEVDD is tied to GND if fuses are not being
programmed.
NOTE
This is to guarantee that analog peripherals can get properly initialized
(reset) values from QVDD domain and NVCCx domain.
6. Negate the POR signal at least 90 μs after all previous steps.
NOTE
This is to guarantee that both POR logic and clocks are stable inside the
MX25 chip, before POR is removed.
In addition, the following power-down sequence is recommended:
1. Turn off power for analog parts, including USBPHY1_VDDA_BIAS, USBPHY1_UPLL_VDD,
USBPHY1_VDDA, USBPHY2_VDD, NVCC_ADC, and FUSEVDD (FUSEVDD is tied to GND
if fuses are not being programmed).
2. Turn off QVDD.
3. Turn off NVCCx, PLL, OSC, and other powers.
NOTE
The power-down steps can be executed simultaneously, or very shortly one
after another.
3.3
Power Characteristics
Table 15 shows values representing maximum current numbers for the i.MX25 under worst case voltage
and temperature conditions. These values are derived from the i.MX25 with core clock speed up to
400 MHz. Additionally, no power saving techniques such as clock gating were implemented when
measuring these values. Common supplies are bundled according to the i.MX25 power-up sequence
requirements. Peak numbers are provided for system designers so that the i.MX25 power supply
requirements are satisfied during startup and transient conditions. Freescale recommends that system
current measurements are taken with customer-specific use-cases to reflect the normal operating
conditions in the end system.
Table 15. Power Consumption
Power Supply
Voltage (V)
Max Current (mA)
QVDD
1.52
360
NVCC_EMI1, NVCC_EMI2
1.9
30
NVCC_CRM, NVCC_SDIO, NVCC_CSI,
NVCC_NFC, NVCC_JTAG, NVCC_LCDC,
NVCC_MISC
3.6
110
MPLL_VDD, UPLL_VDD
1.65
20
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