參數(shù)資料
型號(hào): MCIMX255AJM4
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA400
封裝: 17 X 17 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-400
文件頁數(shù): 84/140頁
文件大?。?/td> 1416K
代理商: MCIMX255AJM4
i.MX25 Applications Processor for Automotive Products, Rev. 8
48
Freescale Semiconductor
Figure 14. MDMA Write Mode Timing
To meet timing requirements, a number of timing parameters must be controlled. See Table 38 for details
on timing parameters for MDMA read and write modes.
3.7.2.3
Ultra DMA (UDMA) Mode Timing
UDMA mode timing is more complicated than PIO mode or MDMA mode. In this section, timing
diagrams for UDMA in- and out-transfers are provided.
Table 38. Timing Parameters for MDMA Read and Write Modes
ATA
Parameter
MDMA Read1
and Write2
Timing
Parameters
Relation
Adjustable
Parameter(s)
tm, ti
tm
tm(min.) = ti(min.) = time_m
× T – (tskew1 + tskew2 + tskew5)
time_m
td
td, td1
td1(min.) = td(min.) = time_d
× T – (tskew1 + tskew2 + tskew6)
time_d
tk
tk(min.) = time_k
× T – (tskew1 + tskew2 + tskew6)
time_k
t0
t0(min.) = (time_d + time_k)
× T
time_d, time_k
tg(read)
tgr
tgr(min.–read) = tco + tsu + tbuf + tbuf + tcable1 + tcable2
tgr(min.–drive) = td – te(drive)
time_d
tf(read)
tfr
tfr(min.–drive) =0 k
tg(write)
tg(min.–write) = time_d
× T –(tskew1 + tskew2 + tskew5)
time_d
tf(write)
tf(min.–write) = time_k
× T – (tskew1 + tskew2 + tskew6)
time_k
tL
tL(max.) = (time_d + time_k–2)
× T – (tsu + tco + 2 × tbuf + 2 × tcable2)
time_d, time_k3
3 tk1 in the UDMA figures equals (tk –2
× T).
tn, tj
tkjn
tn= tj= tkjn = (max.(time_k,. time_jn)
× T – (tskew1 + tskew2 + tskew6)
time_jn
—ton
toff
ton = time_on
× T – tskew1
toff = time_off
× T – tskew1
ADDR
(See note 1)
DIOW
Write Data(15:0)
DMARQ
DMACK
tkjn
tk1
buffer_en
tm ton td1
tk
td
toff
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