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| 型號(hào)： | MCIMX515DJZK8C |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 24/202頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU I.MX51 527MAPBGA |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | i.MX51 |
| 核心處理器： | ARM? Cortex?-A8 |
| 芯體尺寸： | 32-位 |
| 速度： | 800MHz |
| 連通性： | 1 線，EBI/EMI，以太網(wǎng)，I²C，IrDA，MMC，SPI，SSI，UART/USART，USB OTG |
| 外圍設(shè)備： | DMA，I²S，LCD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 128 |
| 程序存儲(chǔ)器類(lèi)型： | ROMless |
| RAM 容量： | 128K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 0.8 V ~ 1.15 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -20°C ~ 85°C |
| 封裝/外殼： | 527-TFBGA |
| 包裝： | 托盤(pán) |
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i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 6
12
Freescale Semiconductor
Features
2.1
Special Signal Considerations
Table 3 lists special signal considerations for the i.MX51. The signal names are listed in alphabetical order.
The package contact assignments are found in Section 5, “Package Information and Contact
Assignments.” Signal descriptions are defined in the i.MX51 Multimedia Applications Processor
Reference Manual (MCIMX51RM).
Table 3. Special Signal Considerations
Signal Name
Remarks
CKIH1, CKIH2
Inputs feeding CAMPs (Clock Amplifiers) that have on-chip ac coupling precluding the need for
external coupling capacitors. The CAMPs are enabled by default, but the main clocks feeding the
on-chip clock tree are sourced from XTAL/EXTAL by default. Optionally, the use of a low jitter
external oscillators to feed CKIH1 or CKIH2 (while not required) can be an advantage if low jitter
or special frequency clock sources are required by modules driven by CKIH1 or CKIH2. See CCM
chapter in the
i.MX51 Multimedia Applications Processor Reference Manual (MCIMX51RM) for
details on the respective clock trees.
After initialization, the CAMPs could be disabled (if not used) by CCM registers (CCR CAMPx_EN
field). If disabled, the on-chip CAMP output is low; the input is irrelevant. If unused, the user should
tie CKIH1/CKIH2 to GND for best practice.
CLK_SS
Clock Source Select is the input that selects the default reference clock source providing input to
the DPLLs. To use a reference in the megahertz range per Table 8, tie CLK_SS to GND to select
EXTAL/XTAL. To use a reference in the kilohertz range per Table 59, tie CLK_SS to NVCC_PER3
to select CKIL. After initialization, the reference clock source can be changed (initial setting is
overwritten).
Note: Because this input has a keeper circuit, Freescale recommends tying this input to directly
to GND or NVCC_PER3. If a series resistor is used its value must be
≤ 4.7 kΩ.
COMP
The user should bypass this reference with an external 0.1
F capacitor tied to GND. If TV OUT is
not used, float the COMP contact and ensure the DACs are powered down.
Note: Previous engineering samples required this reference to be bypassed to a positive supply.
FASTR_ANA and
FASTR_DIG
These signals are reserved for Freescale manufacturing use only. User must tie both connections
to GND.
GPANAIO
This signal is reserved for Freescale manufacturing use only. Users should float this output.
GPIO_NAND
This is a general-purpose input/output (GPIO3_12) on the NVCC_NANDF_A power rail.
IOB, IOG, IOR,
IOB_BACK, IOG_BACK,
and IOR_BACK
These signals are analog TV outputs that should be tied to GND when not being used.
JTAG_
nnnn
The JTAG interface is summarized in Table 4. Use of external resistors is unnecessary. However,
if external resistors are used, the user must ensure that the on-chip pull-up/down configuration is
followed. For example, do not use an external pull down on an input that has on-chip pull-up.
JTAG_TDO is configured with a keeper circuit such that the floating condition is eliminated if an
external pull resistor is not present. An external pull resistor on JTAG_TDO is detrimental and
should be avoided.
JTAG_MOD is referenced as SJC_MOD in the
i.MX51 Multimedia Applications Processor
Reference Manual (MCIMX51RM). Both names refer to the same signal. JTAG_MOD must be
externally connected to GND for normal operation. Termination to GND through an external
pull-down resistor (such as 1 k
Ω) is allowed.
NC
These signals are No Connect (NC) and should be floated by the user.
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| MCIMX515DVK8C | 功能描述:處理器 - 專(zhuān)門(mén)應(yīng)用 ELVIS 3.0 RoHS:否 制造商:Freescale Semiconductor 類(lèi)型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
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| MCIMX516AJM6CR2 | 制造商:Freescale Semiconductor 功能描述:ELVIS 3.0 AUTO NO MV - Tape and Reel |
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