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參數(shù)資料
| 型號(hào)： | MCM20027IBMN |
| 廠商： | MOTOROLA INC |
| 元件分類(lèi)： | 圖像傳感器 |
| 英文描述： | Color SXGA Digital Image Sensor 1280 x 1024 pixel progressive scan solid state image sensor with integrated CDS/PGA/ADC, digital programming, control |
| 中文描述： | IMAGE SENSOR-CMOS, 10fps, 0.20-2.80V, SQUARE, SURFACE MOUNT |
| 封裝： | CERAMIC, LCC-48 |
| 文件頁(yè)數(shù)： | 62/74頁(yè) |
| 文件大小： | 973K |
| 代理商： | MCM20027IBMN |
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MOTOROLA, INC. 2001
Revision 8.0 - 28 November 2001 : MCM20027
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
62
ImageMOS
Register Value =
70
The
FRC Definition Register; Table 54
allows the user to define the size of the dark rows to use as Clamping rows.
The frcs bit identifies the starting position of the Clamping rows. i.e. If 4d is written to this register, the first clamped
dark row would be the 4th row.
The frcd bit identifies the FRC row depth. Allows the user to select the number of dark rows to clamp on.
NOTE! Since there exists ONLY 11 dark rows the addition of FRC Row Depth + FRC Row Start should not be great-
er than 11, otherwise light rows would be clamped in the process.
Address
65
h
Pixel Data Stream Signal Control Register
Default
00
h
msb (7)
6
5
4
3
2
1
lsb (0)
x
vcb
vsg
vcc
FUO
FUO
FUO
FUO
Bit
Number
Function
Description
Reset
State
7
Unused
Unused
x
6
Vcode
Blanking
1
b
= All blanking data will be forced to 0
0
b
= Blanking of Data
0
b
5
Vcode
Sync Gen-
eration
1
b
= Prefixes 3FF x 4 to beginning of active pixel data to indicate
start of Row 1(SOF signal). Prefixes 3FF x 2 and then 000 x 2 to
indicate start of all following Rows of data (VCLK) [Encoded data
stream]
0
b
= Use of SOF, HCLK etc. signals for sync generation (No
coded data stream)
0
b
4
Vcode
Clipping
1
b
= Will clip output data stream to values 001
b
to 3FE
b
0
b
= No clipping of output data stream
0
b
3 - 0
FUO
Factory Use Only
0000
b
Table 53. Pixel Data Stream Signal Control Register
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