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參數(shù)資料
| 型號(hào)： | MCM67A618BFN10 |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | 64K x 18 Bit Asynchronous/ Latched Address Fast Static RAM |
| 中文描述： | 64K X 18 CACHE SRAM, 10 ns, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁(yè)數(shù)： | 4/12頁(yè) |
| 文件大小： | 141K |
| 代理商： | MCM67A618BFN10 |
MCM67A618B
4
MOTOROLA FAST SRAM
AC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V
±
5%, TA = 0 to + 70
°
C, Unless Otherwise Noted)
Input Timing Measurement Reference Level
Input Pulse Levels
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Rise/Fall Time
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 V
. . . . . . . . . . . . . . .
0 to 3.0 V
3 ns
Output Timing Reference Level
Output Load
. . . . . . . . . . . . . . . . . .
1.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 1 Unless Otherwise Noted
ASYNCHRONOUS READ CYCLE TIMING
(See Notes 1 and 2)
MCM67A618B–10
MCM67A618B–12
MCM67A618B–15
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Unit
Notes
Read Cycle Times
tAVAV
10
—
12
—
15
—
ns
3
Access Times:
Address Valid to Output Valid
E Low to Output Valid
Output Enable Low to Output Valid
tAVQV
tELQV
tGLQV
tAXQX
—
—
—
10
10
5
—
—
—
12
12
6
—
—
—
15
15
7
ns
4
Output Hold from Address Change
4
—
4
—
4
—
ns
Output Buffer Control:
E Low to Output Active
G Low to Output Active
E High to Output High–Z
G High to Output High–Z
tELQX
tGLQX
tEHQZ
tGHQZ
3
1
2
2
—
—
5
5
3
1
2
2
—
—
6
6
3
1
2
2
—
—
7
7
ns
5
Power Up Time
tELICCA
0
—
0
—
0
—
ns
NOTES:
1. AL and DL are equal to VIH for all asynchronous cycles.
2. Both Write Enable signals (LW, UW) are equal to VIH for all read cycles.
3. All read cycle timing is referenced from the last valid address to the first transitioning address.
4. Addresses valid prior to or coincident with E going low.
5. Transition is measured
±
500 mV from steady–state voltage. This parameter is sampled and not 100% tested. At any given voltage and temper-
ature, tEHQZ is less than tELQX and tGHQZ is less than tGLQX for a given device.
OUTPUT
Z0 = 50
RL = 50
VL = 1.5 V
Figure 1. AC Test Load
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| MCM67A618BFN12 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:64K x 18 Bit Asynchronous/ Latched Address Fast Static RAM |
| MCM67A618BFN15 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:64K x 18 Bit Asynchronous/ Latched Address Fast Static RAM |
| MCM67A618FN10 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:64K x 18 Bit Asychronous/Latched Address Fast Static RAM |
| MCM67A618FN12 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:64K x 18 Bit Asychronous/Latched Address Fast Static RAM |
| MCM67A618FN15 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:64K x 18 Bit Asychronous/Latched Address Fast Static RAM |
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