參數(shù)資料
型號: MCM8A10SG15
廠商: MOTOROLA INC
元件分類: DRAM
英文描述: 16 Characters x 4 Lines, 5x7 Dot Matrix Character and Cursor
中文描述: 1M X 8 MULTI DEVICE SRAM MODULE, 15 ns, SMA72
封裝: SIMM-72
文件頁數(shù): 3/8頁
文件大?。?/td> 79K
代理商: MCM8A10SG15
MCM8A10
3
MOTOROLA FAST SRAM
TRUTH TABLE
E
W
Mode
I/O Pin
Cycle
Current
H
X
Not Selected
High–Z
ISB1, ISB2
ICCA
ICCA
L
H
Read
Dout
High–Z
Read
L
L
Write
Write
NOTE: H = High, L = Low, X = Don’t Care
ABSOLUTE MAXIMUM RATINGS
(See Note)
Rating
Symbol
Value
Unit
Power Supply Voltage Relative to VSS
Voltage Relative to VSS for Any Pin
Except VCC
VCC
Vin, Vout
– 0.5 to 7.0
V
– 0.5 to VCC + 0.5
V
Output Current
Iout
±
20
mA
Power Dissipation
PD
Tbias
TA
Tstg
8.8
W
Temperature Under Bias
– 10 to + 85
°
C
Operating Temperature
0 to + 70
°
C
Storage Temperature
– 55 to + 150
°
C
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V
±
5%, TA = 0 to 70
°
C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Max
Unit
Supply Voltage (Operating Voltage Range)
VCC
VIH
VIL
4.75
5.25
V
Input High Voltage
2.2
VCC +0.3**
0.8
V
Input Low Voltage
– 0.5*
V
*VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width
20 ns).
**VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2 V ac (pulse width
20 ns).
DC CHARACTERISTICS AND SUPPLY CURRENTS
Parameter
Symbol
Min
Max
Unit
Input Leakage Current (All Inputs, Vin = 0 to VCC)
Output Leakage Current (E = VIH, Vout = 0 to VCC)
AC Active Supply Current (Iout = 0 mA, VCC = max)
AC Standby Current (VCC = max, E = VIH, f
fmax)
CMOS Standby Current (E
VCC – 0.2 V, Vin
VSS + 0.2 V or
VCC – 0.2 V,
VCC = max, f = 0 MHz)
Ilkg(I)
Ilkg(O)
ICCA
ISB1
ISB2
±
1
μ
A
±
1
μ
A
920
mA
320
mA
40
mA
Output Low Voltage (IOL = + 8.0 mA)
Output High Voltage (IOH = – 4.0 mA)
VOL
VOH
0.4
V
2.4
V
CAPACITANCE
(f = 1.0 MHz, dV = 3.0 V, TA = 25
°
C, Periodically Sampled Rather Than 100% Tested)
Characteristic
Symbol
Typ
Max
Unit
Input Capacitance
Address Inputs
E
W
Cin
42
50
10
58
74
13
pF
Input and Output Capacitance
D, Q
Cin, Cout
10
13
pF
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to these high–impedance
circuits.
This CMOS memory circuit has been
designed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The circuit is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear feet
per minute is maintained.
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