參數(shù)資料
型號(hào): MCP1725
廠(chǎng)商: Microchip Technology Inc.
英文描述: 500 mA, Low Voltage, Low Quiescent Current LDO Regulator
中文描述: 500毫安,低電壓,低靜態(tài)電流LDO穩(wěn)壓器
文件頁(yè)數(shù): 18/32頁(yè)
文件大?。?/td> 1000K
代理商: MCP1725
MCP1725
DS22026A-page 18
2006 Microchip Technology Inc.
4.6
C
DELAY
Input
The C
DELAY
input is used to provide the power-up
delay timing for the power good output, as discussed in
the previous section. By adding a capacitor from the
C
DELAY
pin to ground, the PWRGD power-up time
delay can be adjusted from 200 μs (no capacitance on
C
DELAY
) to 300 ms (0.1 μF of capacitance on C
DELAY
).
See
Section 1.0 “Electrical Characteristics”
for
C
DELAY
timing tolerances.
Once the power good threshold (rising) has been
reached, the C
DELAY
pin charges the external capacitor
to V
IN
. The charging current is 140 nA (typical). The
PWRGD output will transition high when the C
DELAY
pin voltage has charged to 0.42V. If the output falls
below the power good threshold limit during the
charging time between 0.0V and 0.42V on the C
DELAY
pin, the C
DELAY
pin voltage will be pulled to ground,
thus resetting the timer. The C
DELAY
pin will be held low
until the output voltage of the LDO has once again risen
above the power good rising threshold. A timing
diagram showing C
DELAY
, PWRGD and V
OUT
is shown
in
Figure 4-4
.
FIGURE 4-4:
Diagram.
C
DELAY
and PWRGD Timing
4.7
Shutdown Input (SHDN)
The SHDN input is an active-low input signal that turns
the LDO on and off. The SHDN threshold is a
percentage of the input voltage. The typical value of
this shutdown threshold is 30% of V
IN
, with minimum
and maximum limits over the entire operating
temperature range of 45% and 15%, respectively.
The SHDN input will ignore low-going pulses (pulses
meant to shut down the LDO) that are up to 400 ns in
pulse width. If the shutdown input is pulled low for more
than 400 ns, the LDO will enter Shutdown mode. This
small bit of filtering helps to reject any system noise
spikes on the shutdown input signal.
On the rising edge of the SHDN input, the shutdown
circuitry has a 30 μs delay before allowing the LDO
output to turn on. This delay helps to reject any false
turn-on signals or noise on the SHDN input signal. After
the 30 μs delay, the LDO output enters its soft-start
period as it rises from 0V to its final regulation value. If
the SHDN input signal is pulled low during the 30 μs
delay period, the timer will be reset and the delay time
will start over again on the next rising edge of the
SHDN input. The total time from the SHDN input going
high (turn-on) to the LDO output being in regulation is
typically 100 μs. See
Figure 4-5
for a timing diagram of
the SHDN input.
FIGURE 4-5:
Diagram.
Shutdown Input Timing
V
OUT
T
PG
V
PWRGD_TH
C
DELAY
C
DELAY
Threshold (0.42V)
PWRGD
0V
V
IN
(typ)
SHDN
V
OUT
30 μs
70 μs
T
OR
400 ns (typ)
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MCP1725-0802E/SN 功能描述:低壓差穩(wěn)壓器 - LDO 500mA CMOS LDO Vout=0.8V RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓(最大值):307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類(lèi)型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20
MCP1725-1202E/MC 功能描述:低壓差穩(wěn)壓器 - LDO 500mA CMOS LDO Vout=1.2V RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓(最大值):307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類(lèi)型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20
MCP1725-1202E/SN 功能描述:低壓差穩(wěn)壓器 - LDO 500mA CMOS LDO Vout=1.2V RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓(最大值):307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類(lèi)型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20
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