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| 型號： | MCP23009-E/SO |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 50/50頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 8B 18SOIC |
| 標準包裝： | 42 |
| 接口： | I²C |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 3.4MHz |
| 電源電壓： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 18-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 18-SOIC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 684 (CN2011-ZH PDF) |
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2009 Microchip Technology Inc.
DS22121B-page 9
MCP23009/MCP23S09
1.4
Multi-bit Address Decoder
The ADDR pin is used to set the slave address of the
MCP23009 (I2C only) to allow up to eight devices on
the bus using only a single pin. Typically, this would
require three pins.
The multi-bit Address Decoder employs a basic FLASH
ADC architecture (Figure 1-4). The seven comparators
generate 8 unique values based on the analog input.
This value is converted to a 3-bit code which
corresponds to the address bits (A2, A1, A0) in the
serial OPCODE.
Sequence
of
Operation
(see
for
timings):
1.
Upon power up (after VDD stabilizes) the module
becomes active after time tADEN. Note, the
analog value on the ADDR pin must be stable
before this point to ensure accurate address
assignment.
2.
The 3-bit address is latched after tADDRLAT.
3.
The module powers down after the first rising
edge of the serial clock is detected (tADDIS).
Once the address bits are latched, the device will keep
the slave address until a POR or reset condition
occurs.
1.4.1
CALCULATING VOLTAGE ON ADDR
When calculating the required voltage on the ADDR pin
(V2), the set point should be the mid-point of the LSb of
the ADC.
The examples in Figure 1-2 and Figure 1-3 show how
to determine the mid point voltage (V2) and the range
of voltages based on a voltage divider circuit. The
maximum
tolerance
is
20%,
however,
it
is
recommended to use 5% tolerance worst case (10%
total tolerance).
FIGURE 1-2:
VOLTAGE DIVIDER EXAMPLE
R2
A0
A1
A2
V2
R1
VDD
MCP23009 Only
VDD
VSS
ADDR
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