參數(shù)資料
型號: MCP25020T-I/SL
廠商: Microchip Technology
文件頁數(shù): 4/66頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER CAN 8B 14SOIC
標(biāo)準(zhǔn)包裝: 2,600
接口: CAN
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時鐘: 4MHz
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 帶卷 (TR)
包括: 存儲器,PWM
配用: MCP2515DM-PCTL-ND - BOARD DEMO FOR MCP2515
其它名稱: MCP25020TI/SL
MCP2502X/5X
DS21664D-page 12
2007 Microchip Technology Inc.
2.7
Acceptance Mask
The acceptance mask is used to define which bits in the
CAN ID are to be compared against the programmable
filters. Individual bits within the mask correspond to bits
in the CAN ID that, in turn, correspond to bits in the
acceptance filters. Any bit in the mask that is set to a ‘1’
will cause the corresponding CAN ID bit to be
compared against the associated filter bit. Any bit in the
mask that is set to a ‘0’ is not compared and effectively
sets the associated CAN ID bit to ‘don’t care’.
2.7.1
MASKS AND STANDARD/
EXTENDED IDS
To insure proper operation of the information request
and input messages, some mask bits (as configured in
the mask registers) may be ignored as explained:
Message with a standard ID - the three least
significant
bits
of
a
standard
identifier
(RXMSIDL.SID2:SID0) are ‘don’t care’ for the mask
registers and effectively become ‘0’.
Message with an extended ID - the three least
significant
bits
of
the
standard
identifier
(RXMSIDL.SID2:SID0) are configurable and the three
least
significant
bits
of
the
extended
identifier
(RXMEID0.EID2:EID0) are always ‘don’t cares’ and
effectively becomes ‘0’.
2.8
Acceptance Filters
There are two separate acceptance filters defined for
the MCP2502X/5X: RXF0 and RXF1. RXF0 is used for
Information Request messages and RXF1 is used for
input messages (see Table 4-2 and Table 4-3). Each bit
in the filters corresponds to a bit in the CAN ID. Every
bit in the CAN ID, for which the corresponding Mask bit
is set, must match the associated filter bit in order for
the message to be accepted. Messages that fail to
meet the mask/fIlter criteria are ignored.
REGISTER 2-6:
TXIDNSIDH - TRANSMIT IDENTIFIER N STANDARD IDENTIFIER HIGH
Note:
The EXIDE bit in the Mask register
(RXMSIDL) can be used to mask the IDE
bit in the corresponding Receive buffer
register (RXBnSIDL).
R/W-x
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
bit 7
bit 0
bit 7-0
SID10:SID3: Standard Identifier bits
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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