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| 型號： | MCP3422A0T-E/MC |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 10/58頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 18BIT 3.75SPS 2CH 8-DFN |
| 產(chǎn)品培訓(xùn)模塊： | MCP3901 Analog Front End |
| 標(biāo)準(zhǔn)包裝： | 3,300 |
| 位數(shù)： | 18 |
| 采樣率（每秒）： | 3.75 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-VFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 8-DFN（2x3） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個(gè)單端，雙極；2 個(gè)差分，雙極 |
| 配用： | MCP3422EV-ND - BOARD EVAL MCP3422 PICKIT SERIAL |
| 其它名稱： | MCP3422A0T-E/MCTR |
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MCP3422/3/4
DS22088C-page 18
2009 Microchip Technology Inc.
5.2
Configuration Register
The device has an 8-bit wide configuration register to
select for: input channel, conversion mode, conversion
rate, and PGA gain. This register allows the user to
change the operating condition of the device and check
the status of the device operation.
The user can rewrite the configuration byte any time
during the device operation. Register 5-1 shows the
configuration register bits.
REGISTER 5-1:
CONFIGURATION REGISTER
R/W-1
R/W-0
R/W-1
R/W-0
RDY
C1
C0
O/C
S1
S0
G1
G0
1 *
0 *
1 *
0 *
bit 7
bit 0
* Default Configuration after Power-On Reset
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
RDY: Ready Bit
This bit is the data ready flag. In read mode, this bit indicates if the output register has been updated
with a latest conversion result. In One-Shot Conversion mode, writing this bit to “1” initiates a new
conversion.
Reading RDY bit with the read command:
1
= Output register has not been updated
0
= Output register has been updated with the latest conversion result
Writing RDY bit with the write command:
Continuous Conversion mode: No effect
One-Shot Conversion mode:
1
= Initiate a new conversion
0
= No effect
bit 6-5
C1-C0: Channel Selection Bits
00
=
Select Channel 1 (Default)
01
=
Select Channel 2
10
=
Select Channel 3 (MCP3424 only, treated as “00” by the MCP3422/MCP3423)
11
=
Select Channel 4 (MCP3424 only, treated as “01” by the MCP3422/MCP3423)
bit 4
O/C: Conversion Mode Bit
1
= Continuous Conversion Mode (Default). The device performs data conversions continuously
0
= One-Shot Conversion Mode. The device performs a single conversion and enters a low power
standby mode until it receives another write or read command
bit 3-2
S1-S0: Sample Rate Selection Bit
00
=
240 SPS (12 bits) (Default)
01
=
60 SPS (14 bits)
10
=
15 SPS (16 bits)
11
=
3.75 SPS (18 bits)
bit 1-0
G1-G0: PGA Gain Selection Bits
00
=x1 (Default)
01
=x2
10
=x4
11
=x8
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