MCP601/1R/2/3/4
DS21314G-page 6
2007 Microchip Technology Inc.
Note: Unless otherwise indicated, T
A = +25°C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL, CL = 50 pF and CS is tied low.
FIGURE 2-7:
Input Offset Voltage.
FIGURE 2-8:
Input Offset Voltage vs.
Temperature.
FIGURE 2-9:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 2.7V.
FIGURE 2-10:
Input Offset Voltage Drift.
FIGURE 2-11:
CMRR, PSRR vs.
Temperature.
FIGURE 2-12:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 5.5V.
0%
2%
4%
6%
8%
10%
12%
14%
16%
-2.0 -1.6 -1.2 -0.8 -0.4 0.0 0.4 0.8 1.2 1.6 2.0
Input Offset Voltage (mV)
P
e
rcentage
of
Occurrences
1200 Samples
-0.5
-0.4
-0.3
-0.2
-0.1
0.0
0.1
0.2
0.3
0.4
0.5
-50
-25
0
25
50
75
100
125
Ambient Temperature (°C)
Input
Off
set
Voltag
e(
m
V)
VDD = 2.7V
VDD = 5.5V
-200
-100
0
100
200
300
400
500
600
700
800
-0
.4
-0
.2
0.
0
0.
2
0.
4
0.
6
0.
8
1.
0
1.
2
1.
4
1.
6
1.
8
2.
0
Common Mode Input Voltage (V)
Input
O
ffs
et
Vol
ta
g
e(
V)
VDD = 2.7V
TA = –40°C
TA = +25°C
TA = +85°C
TA = +125°C
0%
2%
4%
6%
8%
10%
12%
14%
16%
18%
-10 -8
-6
-4
-2
02468
10
Input Offset Voltage Drift (V/°C)
Percent
age
of
Occurrences
1200 Samples
TA = –40 to +125°C
75
80
85
90
95
100
-50
-25
0
25
50
75
100
125
Ambient Temperature (°C)
CM
R
,PSRR
(
d
B)
PSRR
CMRR
-200
-100
0
100
200
300
400
500
600
700
800
-0
.5
0.
0
0.
5
1.
0
1.
5
2.
0
2.
5
3.
0
3.
5
4.
0
4.
5
5.
0
Common Mode Input Voltage (V)
Input
O
ffs
et
Vol
ta
g
e(
V)
VDD = 5.5V
TA = –40°C
TA = +25°C
TA = +85°C
TA = +125°C