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| 型號(hào)： | MCP6H01T-E/LT |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 10/46頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OP AMP 16V 1.2MHZ SGL SC-70-5 |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 1 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 0.8 V/µs |
| 增益帶寬積： | 1.2MHz |
| 電流 - 輸入偏壓： | 10pA |
| 電壓 - 輸入偏移： | 700µV |
| 電流 - 電源： | 135µA |
| 電流 - 輸出 / 通道： | 50mA |
| 電壓 - 電源，單路/雙路(±)： | 3.5 V ~ 16 V，±1.75 V ~ 8 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 6-TSSOP（5 引線），SC-88A，SOT-353 |
| 供應(yīng)商設(shè)備封裝： | SC-70-5 |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | MCP6H01T-E/LTTR |
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MCP6H01/2/4
DS22243D-page 18
2010-2011 Microchip Technology Inc.
For a unity gain buffer, VIN must be maintained below
VDD – 2.3V for correct operation.
4.2
Rail-to-Rail Output
The output voltage range of the MCP6H01/2/4 op amps
is 0.020V (typical) and 14.980V (typical) when
RL =10k is connected to VDD/2 and VDD =15V.
Refer
to
Figures 2-24
through
for
more
information.
4.3
Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1V/V) is the
most sensitive to capacitive loads, all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = + 1V/V), a small series
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will generally be lower than the bandwidth
with no capacitance load.
FIGURE 4-4:
Output Resistor, RISO
Stabilizes Large Capacitive Loads.
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit’s noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1 + |Signal Gain| (e.g., -1V/V gives GN = +2V/V).
After selecting RISO for your circuit, double check the
resulting
frequency
response
peaking
and
step
response overshoot. Modify RISO’s value until the
response
is
reasonable.
Bench
evaluation
and
simulations with the MCP6H01/2/4 SPICE macro
model are helpful.
FIGURE 4-5:
Recommended RISO Values
for Capacitive Loads.
4.4
Supply Bypass
With this family of operational amplifiers, the power
supply pin (VDD for single supply) should have a local
bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm
for good high-frequency performance. It can use a bulk
capacitor (i.e., 1 F or larger) within 100 mm to provide
large, slow currents. This bulk capacitor can be shared
with other analog parts.
4.5
Unused Op Amps
An unused op amp in a quad package (MCP6H04)
should be configured as shown in Figure 4-6. These
circuits prevent the output from toggling and causing
crosstalk. Circuit A sets the op amp at its minimum
noise gain. The resistor divider produces any desired
reference voltage within the output voltage range of the
op amp, and the op amp buffers that reference voltage.
Circuit B uses the minimum number of components
and operates as a comparator, but it may draw more
current.
FIGURE 4-6:
Unused Op Amps.
VIN
RISO
VOUT
CL
–
+
MCP6H0X
1
10
100
1000
1.E-11
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
Normalized Load Capacitance; CL/GN (F)
Re
c
o
m
en
d
ed
R
IS
O
(
)
GN:
1 V/V
2 V/V
5 V/V
VDD = 16V
RL = 10 k
10p
100p
1n
10n
0.1
1
1k
VDD
R1
R2
VDD
VREF
V
REF
V
DD
R
2
R
1
R
2
+
--------------------
=
MCP6H04 (A)
MCP6H04 (B)
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