參數(shù)資料
型號: MCZ33285EF
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Dual High-Side TMOS Driver
中文描述: 雙高邊的TMOS驅(qū)動器
文件頁數(shù): 7/13頁
文件大?。?/td> 173K
代理商: MCZ33285EF
Analog Integrated Circuit Device Data
Freescale Semiconductor
7
33285
FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The power FETs are turned ON by charging their gate
capacities with a current flowing out of pins OUT1 and OUT2.
During PWM, the values of table below are guaranteed. They
are measured with 8.0 nF on OUT1 and 16 nF on OUT2. Test
condition V
IN
:
ramp 0 V
2.5 V or 2.5 V
5.0 V.
Figure 4. Turn On Behavior
The output voltages at OUT1 and OUT2 are limited by
controlling the current sources I
ON1
, I
ON2
to avoid current
flowing through the external or the internal zener diode.
When voltage power supply plus threshold voltage
(V
CC
+ V
TH
) is reached, the current sources are turned OFF.
Threshold V
TH1
for OUT1 output voltage control is
7.0 V < V
TH1
< V
Z
Threshold V
TH2
for OUT2 output voltage control is
7.0 V < V
TH2
< 15 V
Turn Off Characteristics
The power FETs on OUT1 and OUT2 are turned OFF by
discharging the gate capacity with the constant discharge
current I
OUTOFF
.
Discharge current I
OUTxOFF
is I
OUTxOFF
= 110
μ
A
condition: V
OUT
x > 0.5 V ( V
IN
< V
THRxIN
)
Test conditions for switching OFF the power FETs:
1. IN open
2. Stages disabled via pin IN
3. Stage OUT1 disabled by an over current error
20 ms
2.5 V
5.0 V
IN
V
CCP
THRIN1
THRIN2
IN
V
OUT1
0 V
0 V
2.5 V
IN
0
2.5 V
0 V
5.0 V
V
OUT2
IN
t
ON1
0
V
VCC
+ 7.0
V
OUT2
V
OUT2MAX
t
ON2
t
ON3
V
OUT1MAX
V
OUT1
V
OUT2
t
ON1
t
ON2
t
ON3
VOLTAGE V
VCC
MINIMUM V
OUT
1, OUT2
AFTER T
ON1
= 100
μ
SEC
MINIMUM V
OUT
1,OUT2
AFTER T
ON2
= 1.0
μ
SEC
MINIMUM V
OUT
1,OUT2
AFTER T
ON3
= 1.5
μ
SEC
7.0 V < V
VCC
< 10 V
10 V < V
VCC
< 20 V
20 V < V
VCC
< 40 V
V
VCC
- 0.7 V
V
VCC
- 0.7 V
V
VCC
- 0.7 V
V
VCC
+ 5.95 V
V
VCC
+ 9.35 V
V
VCC
+ 7.0 V
V
VCC
+ 11 V
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