參數(shù)資料
型號: MCZ33291LEG
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Eight-Output Switch with Serial Peripheral Interface I/O
中文描述: 8輸出開關(guān)串行外設(shè)接口的I / O
文件頁數(shù): 10/25頁
文件大?。?/td> 389K
代理商: MCZ33291LEG
Analog Integrated Circuit Device Data
Freescale Semiconductor
10
33291L
ELECTRICAL CHARACTERISTICS
ELECTRICAL PERFORMANCE CURVES
Figure 8. Switching Time Test Circuit
Figure 9. Output Fault Unlatch Disable
Delay Test Circuit
Figure 10. Turn-On/-Off Waveforms
Figure 11. Output Fault Unlatch Disable
Delay Waveforms
C
L
represents the total capacitance of the test fixture and probe.
CS
Output
C
L
33291L
Under
Test
V
DD
= 5.0 V
V
PWR
= 14 V
R
L
= 26
CS
Output
C
L
= 20 pF
33291L
Under
Test
V
DD
= 5.0 V
V
PWR
= 11 V
C
L
represents the total capacitance of the test fixture and probe.
Ι
L
= 2.0 Α
(Ουτπυτ ΟΝ)
90%
50%
10%
90%
10%
t
DLY(OFF)
t
DLY(ON)
CS
Output Voltage
Waveform 1
Output Voltage
Waveform 2
t
R(SI)
< 50 ns
< 50 ns
t
F(SI)
5.0 V
0
14 V
V
OL
V
OL
14 V
1. t
DLY(ON)
and T
DLY(OFF)
are turn-ON and turn-OFF propagation delay
times.
2. Turn-OFF is an output programmed from an ON to an OFF state.
3. Turn-ON is an output programmed from and OFF to an ON state.
90%
10%
50%
< 50 ns
< 50 ns
t
PDLY(OFF)
t
R(SI)
t
F(SI)
CS
Output Voltage
Waveform
Output Current
Waveform
5.0 V
0
V
OFF
= 11 V
I
O(CL)
V
ON
= 5.0 V
0
1. t
PDLY(OFF)
is the output fault unlatch disable propagation delay time re-
quired to correctly report an output fault after
CS
rises. It represents an
output commanded ON while having an existing output short (overcurrent)
to supply.
2. The SFPD pin < 0.2 V.
50%
50%
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