參數(shù)資料
型號: MCZ33800EK
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Engine Control Integrated Circuit
中文描述: 發(fā)動機控制集成電路
文件頁數(shù): 24/39頁
文件大?。?/td> 461K
代理商: MCZ33800EK
Analog Integrated Circuit Device Data
Freescale Semiconductor
24
33800
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
33800 will wait for the Short Fault Time period and then shut
down the output drive, setting the fault status bit to a 1 in the
Serial Output Response Register.
Example: Load Measurement Operation
To perform an accurate load resistance measurement the
33800 device uses an alternate channel to determine a
differential load voltage and forces a known load current.
With the differential load voltage and the forced current the
load resistance is calculated. As shown in
Table 6
, channel 2
is used as the battery reference for the load measurement of
channel 1. The current through the channel 1 load is set by
the external resistor. Setting the resistance to 25
forces a
current of 100mA. The measurement is sampled within
200
μ
s and is held for 150ms on the Load Resistance
Feedback (L
RFDBK
) output. The differential amplifier has a
fixed gain of 2.5V. Hence for this example, a 10
load will
produce a 2.5V output. When a second pair is selected for
measurement, the sample and hold is reset and the
measurement is immediately directed to the new load
measurement. The previous pair immediately revert back to
normal operation.
Figure 9. Example of Channel 1 Measurement
OCTAL OUTPUT DRIVER (OCTAL SERIAL
SWITCH; OSS)
The 33800 provides flexible control of 8 low side driver
outputs. Outputs 1 and 2 are specifically designed with higher
current limit to accommodate lamp inrush current. The device
allows for parallel control and/or SPI control through the use
of several input command words. This section describes the
logic operation and commands for the octal driver.
The 33800 Octal Output Driver message set consists of
eight commands, and one response as shown in
Table 12
.
Bits 11 through 15 determine the specific command and bits
0 through 10 determine how a specific output will operate.
The 33800 operates on the command word on the rising edge
of CS. The Most Significant Bit (MSB) is sent and received
first.
Note
Upon Power-ON Reset all OSS bits are defined as
shown in
Table 12
.
Table 11. PWM Short Fault Timer
PWM FLT Timer
Bits
210
543
876
Fault Timer Select
000
30
μ
s
001
60
μ
s
010
120
μ
s
011
240
μ
s
100
480
μ
s
101
960
μ
s
110
No Change
111
No Change
Notes: Tolerance on fault timer setting is
±10%
with calibrated part.
V
PWR
VDSNS2
VSSNS123
GD2
Gate Drive
Control &
Diagnostics
+
REXT
LRFDBK
Predriver 2
+
+
VCAL
V
PWR
VDSNS1
VSSNS123
GD1
Predriver 1
Differential
Amplifier
Gate Drive
Control &
Diagnostics
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