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參數(shù)資料
| 型號： | MCZ33989EG |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 14/72頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SYSTEM BASIS CHIP CAN 28-SOIC |
| 標(biāo)準(zhǔn)包裝： | 26 |
| 系列： | * |
| 應(yīng)用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC W |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
21
33989
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
STANDBY MODE
Only regulator 1 is ON. Regulator 2 is turned OFF by disabling the V2 control pin. Only the wake-up capability of the CAN
interface is available. Other functions available are wake-up input reading through SPI and HS1 activation. The Watchdog is
running.
NORMAL MODE
In this mode, both regulators are ON. This corresponds to the normal application operation. All functions are available in this
mode (Watchdog, wake-up input reading through SPI, HS1 activation, CAN communication). The software Watchdog is running
and must be periodically cleared through SPI.
STOP MODE
Regulator 2 is turned OFF by disabling the V2 control pin. The regulator 1 is activated in a special low power mode, allowing
to deliver few mA. The objective is to maintain the MCU of the application supplied while it is turned into power saving condition
(i.e Stop or Wait modes). In Stop mode the device supply current from VBAT is very low.
When the application is in Stop mode (both MCU and SBC), the application can wake-up from the SBC side (for example:
cyclic sense, forced wake-up, CAN message, wake-up inputs and overcurrent on VDD1), or the MCU side (key wake-up, etc.).
Stop mode is always selected by the SPI. In Stop mode the software Watchdog can be running or idle depending upon
selection by the SPI (RCR, bit WDSTOP). To clear the watchdog, the SBC must be awakened by a CS pin (SPI wake-up). In
Stop mode, SBC wake-up capability are identical as in Sleep mode. Please refer to Table 5.
SLEEP MODE
Regulators 1 and 2 are OFF. The current from VSUP pin is reduced. In this mode, the device can be awakened internally by
cyclic sense via the wake-up inputs pins and HS1 output, from the forced wake-up function and from the CAN physical interface.
When a wake-up occurs the SBC goes first into reset mode before entering Normal Request mode.
RESET MODE
In this mode, the Reset (RST) pin is low and a timer is running for a time RSTDUR. After this time is elapsed, the SBC enters
Normal Request mode. Reset mode is entered if a reset condition occurs (VDD1 low, watchdog timeout or watchdog trigger in a
closed window).
NORMAL REQUEST MODE
This is a temporary mode automatically accessed by the device after the reset mode, or after the SBC wake-up from
Stop mode. After wake-up from the Sleep mode or after the device power-up, the SBC enters the Reset mode before entering
the Normal Request mode. After a wake-up from the Stop mode, the SBC enters Normal Request mode directly.
In Normal Request mode the VDD1 regulator is ON, V2 is OFF, the reset pin is high. As soon as the device enters the Normal
Request mode an internal 350 ms timer is started. During these 350 ms the microcontroller of the application must address the
SBC via the SPI, configuring the Watchdog register. This is the condition for the SBC to stop the 350 ms timer and to go into the
Normal or Standby mode and to set the watchdog timer according to configuration.
NORMAL REQUEST ENTERED AND NO WD CONFIGURATION OCCURS
In case the Normal Request mode is entered after SBC power-up, or after a wake-up from Stop mode, and if no WD
configuration occurs while the SBC is in Normal Request mode, the SBC goes to Reset mode after the 350 ms time period is
expired before again going into Normal Request mode. If no WD configuration is achieved, the SBC alternatively goes from
Normal Request into reset, then Normal Request modes etc.
In case the Normal Request mode is entered after a wake-up from Sleep mode, and if no WD configuration occurs while the
SBC is in Normal Request mode, the SBC goes back to Sleep mode.
APPLICATION WAKE-UP FROM SBC SIDE
When an application is in Stop mode, it can wake-up from the SBC side. When a wake-up is detected by the SBC (for example,
CAN, Wake-up input, etc.) the SBC turns itself into Normal Request mode and generates an interrupt pulse at the INT pin.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCZ33989EG | 制造商:Freescale Semiconductor 功能描述:IC SYSTEM BASIS W/CAN TRANCEIVER |
| MCZ33989EGR2 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SBC-HS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MCZ33990EF | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC CLASS B SERIAL TRANS. RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MCZ33990EF | 制造商:Freescale Semiconductor 功能描述:TRANCEIVER J-1850 CLASS B 8SOIC |
| MCZ33990EF/R2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Enhanced Class B Serial Transceiver |
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