參數(shù)資料
型號(hào): MD1711
廠商: Supertex, Inc.
英文描述: HIGH SPEED INTEGRATED ULTRASOUND DRIVER IC
中文描述: 高速集成電路超聲驅(qū)動(dòng)IC
文件頁(yè)數(shù): 3/9頁(yè)
文件大小: 192K
代理商: MD1711
MD1711
NR012505
3
DC Electrical Characteristics
(Over operating conditions unless otherwise specified, AV
DD
1=DV
DD
1=DV
DD
2=10V, AV
SS
=DV
SS
=-10V, V
LL
=3.3V, T
A
= 0 to 70°C)
P-Channel Gate Driver Outputs
Sym
Parameter
Min
R
SINK
Output sink resistance
R
SOURCE
Output source resistance
I
SINK
Peak output sink current
I
SOURCE
Peak output source current
N-Channel Gate Driver Outputs
Sym
Parameter
Min
R
SINK
Output sink resistance
R
SOURCE
Output source resistance
I
SINK
Peak output sink current
I
SOURCE
Peak output source current
Logic Inputs
Sym
Parameter
Min
V
IH
Input logic high voltage
0.8V
LL
V
IL
Input logic low voltage
0
I
IH
Input logic high current
I
IL
Input logic low current
-1.0
Typ
2.0
2.0
Max
6.0
6.0
Units
A
A
Conditions
I
SINK
=100mA
I
SOURCE
=100mA
Typ
Max
10
Units
Conditions
I
SINK
=100mA
I
SOURCE
=100mA
10
1.5
A
1.5
A
Typ
Max
V
LL
0.2V
LL
1.0
Units
V
V
μA
μA
Conditions
AC Electrical Characteristics
(Over operating conditions unless otherwise specified, AV
DD
1=DV
DD
1=DV
DD
2=10V, AV
SS
=DV
SS
=-10V, V
LL
=3.3V, T
A
= 0 to 70°C)
Sym
Parameter
Min
Typ
Max
Units
Conditions
f
OUT
Output frequency range
Propagation delay when output
is from low to high
Propagation delay when output
is from high to low
Output rise time
20
MHz
t
PH
19
ns
No load, See timing diagram
t
PL
19
ns
No load, See timing diagram
tr
8.0
ns
1000pF load, see timing diagram
tf
Output fall time
8.0
ns
1000pF load, see timing diagram
t
dm
t
DLAY
SR
Delay time matching
±3.0
ns
No load, From device to device
Output jitter
30
ps
Standard deviation of t
d
samples (1k)
Output slew rate
2
nd
harmonic distortion
12
V/ns
HD2
-40
dB
Measured at TC6320 output with
100
Load
Power-Up Sequence
1
AV
SS
, DV
SS
Negative Gate Drive Supply and Substrate Bias
2
V
LL
, AV
DD
1, DV
DD
1 & DV
DD
2
Logic Supply, Positive Gate Drive Supply and Bias
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