參數(shù)資料
型號(hào): MD1811K6-G
廠商: SUPERTEX INC
元件分類(lèi): MOSFETs
英文描述: HIGH SPEED QUAD MOSFET DRIVER
中文描述: 2 A AND GATE BASED MOSFET DRIVER, QCC16
封裝: 4 X 4 MM, 0.90 MM HEIGHT, GREEN, QFN-16
文件頁(yè)數(shù): 1/6頁(yè)
文件大小: 459K
代理商: MD1811K6-G
MD1811
High Speed Quad MOSFET Driver
1
NR090105
Initial Release
Features
6ns rise and fall time
2 A peak output source/sink current
1.2V to 5V input CMOS compatible
5V to 12V total supply voltage
Smart Logic threshold
Low jitter design
Quad matched channels
Drives two N and two P Channel MOSFETs
Outputs can swing below ground
Low inductance quad flat no-lead package
High-performance thermally-enhanced
Applications
Medical ultrasound imaging
Piezoelectric transducer drivers
Nondestructive evaluation
PIN diode driver
Clock driver/buffer
High speed level translator
General Description
The Supertex MD1811 is a high speed, quad MOSFET driver designed to
drive high voltage P/N-channel MOSFETs for medical ultrasound applications
and other applications requiring a high output current for a capacitive load.
The high-speed input stage of the MD1811 can operate from a 1.2 to 5.0
volt logic interface with an optimum operating input signal range of 1.8 to 3.3
volts. An adaptive threshold circuit is used to set the level translator switch
threshold to the average of the input logic 0 and logic 1 levels. The input
logic levels may be ground referenced, even though the driver is putting
out bipolar signals. The level translator uses a proprietary circuit, which
provides DC coupling together with high-speed operation.
The output stage of the MD1811 has separate power connections enabling
the output signal L and H levels to be chosen independently from the supply
voltages used for the majority of the circuit. As an example, the input logic
levels may be 0 and 1.8 volts, the control logic may be powered by +5 and
–5 volts, and the output L and H levels may be varied anywhere over the
range of –5 to +5 volts. The output stage is capable of peak currents of up
to ±2 amps, depending on the supply voltages used and load capacitance
present. The OE pin serves a dual purpose. First, its logic H level is used
to compute the threshold voltage level for the channel input level translators.
Secondly, when OE is low, the outputs are disabled, with the A & C output
high and the B & D output low. This assists in properly pre-charging the AC
coupling capacitors that may be used in series in the gate drive circuit of an
external PMOS and NMOS transistor pair.
Typical Application Circuit
3.3V CMOS
Logic Inputs
OUTA
OUTB
OUTC
OUTD
+10V
0.22 F
V
DD
V
H
+10V
0.47 F
V
SS
V
L
GND
INA
INB
INC
IND
OE
+PLS1
#1
-PLS1
ENAB
+PLS2
#2
-PLS2
10nF
10nF
10nF
+100V
1 F
To Piezoelectric
Transducer #1
-100V
1 F
Supertex
TC6320
Supertex
TC6320
10nF
+100V
1 F
-100V
1 F
To Piezoelectric
Transducer #2
Supertex MD1811
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