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參數(shù)資料
| 型號： | MD1811K6-G |
| 廠商： | SUPERTEX INC |
| 元件分類： | MOSFETs |
| 英文描述： | HIGH SPEED QUAD MOSFET DRIVER |
| 中文描述： | 2 A AND GATE BASED MOSFET DRIVER, QCC16 |
| 封裝： | 4 X 4 MM, 0.90 MM HEIGHT, GREEN, QFN-16 |
| 文件頁數(shù)： | 5/6頁 |
| 文件大?。?/td> | 459K |
| 代理商： | MD1811K6-G |
5
NR090105
MD1811
Application Information
For proper operation of the MD1811, low inductance bypass
capacitors should be used on the various supply pins. The GND
pin should be connected to the logic ground. The INA, INB INC,
IND, and OE pins should be connected to a logic source with a
swing of GND to V
, where V
is 1.2 to 5.0 volts. Good trace
practices should be followed corresponding to the desired operating
speed. The internal circuitry of the MD1811 is capable of operating
up to 100MHz, with the primary speed limitation being the loading
effects of the load capacitance. Because of this speed and the
high transient currents that result with capacitive loads, the bypass
capacitors should be as close to the chip pins as possible. Unless
the load specifically requires bipolar drive, the V
, and V
pins
should have low inductance feed-through connections directly to a
ground plane. If these voltages are not zero, then they need bypass
capacitors in a manner similar to the positive power supplies. The
power connection V
should have a ceramic bypass capacitor to
the ground plane with short leads and decoupling components to
prevent resonance in the power leads.
The voltages of V
and V
decide the output signal levels. These
two pins can draw fast transient currents of up to 2A, so they
should be provided with an appropriate bypass capacitor located
next to the chip pins. A ceramic capacitor of up to 1.0μF may be
appropriate, with a series ferrite bead to prevent resonance in the
power supply lead coming to the capacitor. Pay particular attention
to minimizing trace lengths, current loop area and using sufficient
trace width to reduce inductance. Surface mount components are
highly recommended. Since the output impedance of this driver is
very low, in some cases it may be desirable to add a small series
resistance in series with the output signal to obtain better waveform
transitions at the load terminals. This will of course reduce the
output voltage slew rate at the terminals of a capacitive load.
Pay particular attention that parasitic couplings are minimized from
the output to the input signal terminals. The parasitic feedback may
cause oscillations or spurious waveform shapes on the edges of
signal transitions. Since the input operates with signals down to
1.2V even small coupled voltages may cause problems. Use of
a solid ground plane and good power and signal layout practices
will prevent this problem. Be careful that a circulating ground
return current from a capacitive load cannot react with common
inductance to cause noise voltages in the input logic circuitry.
Pin Description
V
DD
High side analog circuit, level shifter and gate drive supply voltage.
V
SS
Low side analog circuit, level shifter and gate drive supply voltage. V
SS
must be connected to the most negative
potential of voltage supplies and powered-up first.
V
H
Supply voltage for P-channel output stage
V
L
Supply voltage for N-channel output stage
GND
Logic input ground reference
OE
Output-Enable logic input. When OE is high, (V
+V
)/2 sets the logic threshold level for inputs, When OE is low,
OUTA and OUTC are at V
H
, OUTB and OUTD are at V
L
, regardless of the inputs INA, INB, INC or IND. Keep OE
low until IC powered up
INA, INB,
INC, IND
Logic input. Controls output when OE is high. Input logic high will cause the output to swing to V
L
. Input logic low
will cause the output to swing to V
H
. Keep all logic inputs low until IC powered up.
OUTA
Output driver. Swings from V
to V
. Intended to drive the gate of an external P-channel MOSFET via a series
capacitor. When OE is low, the output is disabled. OUTA will swing to V
H
turning off the external P-channel
MOSFET.
OUTB
Output driver. Swings from V
to V
. Intended to drive the gate of an external N-channel MOSFET via a series
capacitor. When OE is low, the output is disabled. OUTB will swing to V
L
turning off the external N-channel
MOSFET.
OUTC
Output driver. Swings from V
to V
. Intended to drive the gate of an external P-channel MOSFET via a series
capacitor. When OE is low, the output is disabled. OUTC will swing to V
H
turning off the external P-channel
MOSFET.
OUTD
Output driver. Swings from V
to V
. Intended to drive the gate of an external N-channel MOSFET via a series
capacitor. When OE is low, the output is disabled. OUTD will swing to V
L
turning off the external N-channel
MOSFET.
Substrate
The IC substrate is internally connected to the thermal pad. Thermal Pad and V
SS
must be connected externally.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| MD1812 | 制造商:SUPERTEX 制造商全稱:SUPERTEX 功能描述:High Speed Quad MOSFET Driver |
| MD1812K6-G | 功能描述:功率驅(qū)動器IC High Speed Quad RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時間: 下降時間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| MD1813 | 制造商:SUPERTEX 制造商全稱:SUPERTEX 功能描述:High Speed Quad MOSFET Driver |
| MD1813K6-G | 功能描述:功率驅(qū)動器IC High Speed Quad RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時間: 下降時間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| MD182 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
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