參數(shù)資料
型號: MD80C52CXXX-25SCD
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40
文件頁數(shù): 43/145頁
文件大?。?/td> 22337K
代理商: MD80C52CXXX-25SCD
137
XMEGA C3 [DATASHEET]
8492F–AVR–07/2013
Table 33-115.SPI timing characteristics and requirements.
33.4.15 Two-Wire Interface Characteristics
Table 33-116 describes the requirements for devices connected to the Two-Wire Interface Bus. The Atmel AVR XMEGA
Two-Wire Interface meets or exceeds these requirements under the noted conditions. Timing symbols refer to Figure 33-
Figure 33-28.Two-wire interface bus timing.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
t
SCK
SCK period
Master
(See Table 20-3 in
XMEGA C Manual)
ns
tSCKW
SCK high/low width
Master
0.5*SCK
tSCKR
SCK rise time
Master
2.7
t
SCKF
SCK fall time
Master
2.7
tMIS
MISO setup to SCK
Master
10
tMIH
MISO hold after SCK
Master
10
t
MOS
MOSI setup SCK
Master
0.5*SCK
tMOH
MOSI hold after SCK
Master
1
tSSCK
Slave SCK period
Slave
4*t ClkPER
t
SSCKW
SCK high/low width
Slave
2*t Clk
PER
tSSCKR
SCK rise time
Slave
1600
tSSCKF
SCK fall time
Slave
1600
t
SIS
MOSI setup to SCK
Slave
3
tSIH
MOSI hold after SCK
Slave
tClkPER
tSSS
SS setup to SCK
Slave
21
t
SSH
SS hold after SCK
Slave
20
t
SOS
MISO setup SCK
Slave
8
tSOH
MISO hold after SCK
Slave
13
t
SOSS
MISO setup after SS low
Slave
11
t
SOSH
MISO hold after SS high
Slave
8
tHD;STA
tof
SDA
SCL
tLOW
tHIGH
tSU;STA
tBUF
tr
tHD;DAT
tSU;DAT
tSU;STO
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