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| 型號： | MEA224AG |
| 廠商： | CONEXANT SYSTEMS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PBGA352 |
| 封裝： | 35 X 35 MM, 2.33 MM HEIGHT, PLASTIC, MS-034, BGA-352 |
| 文件頁數(shù)： | 14/29頁 |
| 文件大?。?/td> | 519K |
| 代理商： | MEA224AG |
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PRELI
MI
NARY
D
A
TA
S
H
EET
XpressFlow-2001 Series –
EA-224
Ethernet Switch Chip-set
4-Port 10/100M Ethernet Access Controller
1997 Zarlink Semiconductor Inc.
Page: 20
Rev. 4.0 –December, 1997
4.4.2 PIN Mapping between MII Interface and 10Mbps Serial Interface
MII Interface
10Mbps Serial Interface
Symbol
Type
Symbol
Type
Name & Functions
Mm_RXD[3:1] TTL In
(5VT)
Not used by Serial Interface Ports. Has a weak
internal pull-up resistor.
Mm_RXD[0]
TTL In
(5VT)
Tm_RXD
TTL In
(5VT)
Receive Data – (one for each Serial Interface
Port) a receive data stream.
Mm_RXDV
TTL In
(5VT)
Not used by Serial Interface Ports. Has a weak
internal pull-up resistor.
Mm_RXC
TTL In
(5VT)
Tm_RXC
TTL In
(5VT)
Receive Clock – (one for each Serial Interface
Port)
Mm_RXER
TTL In
(5VT)
Not used by Serial Interface Ports. Has a weak
internal pull-up resistor.
Mm_TXER
CMOS
Output
Not used by Serial Interface Ports.
Mm_TXC
TTL In
(5VT)
Tm_TXC
TTL In
(5VT)
Transmit Clock – (one for each Serial Inter-
face Port) a continuous clock input with 35% to
65% duty cycles.
Mm_TXEN
CMOS
Output
Tm_TXEN
CMOS
Output
Transmit Enable – (one for each Serial Inter-
face Port)
Mm_TXD[0]
CMOS
Output
Tm_TXD
CMOS
Output
Transmit Data – (one for each Serial Interface
Port) a transmit data stream.
Mm_TXD[1]
CMOS
Output
Not used by Serial Interface Ports
Mm_TXD[2]
CMOS
Output
Tm_LPBK
? CMOS
Output
Loop Back Enable – (one for each Serial In-
terface Port) The polarity of this signal is pro-
grammable via Port Configuration Register
Mm_TXD[3]
CMOS
Output
Tm_FD
? CMOS
Output
Full Duplex Mode – (one for each Serial In-
terface Port) The polarity of this signal is pro-
grammable via Port Configuration Register
Mm_COL
TTL In
(5VT)
Tm_COL
TTL In
(5VT)
Collision Detected – (one for each Serial In-
terface Port)
Mm_CRS
TTL In
(5VT)
Tm_CRS
TTL In
(5VT)
Carrier Sense – (one for each Serial Interface
Port)
Mm_LNK
? TTL In
(5VT)
Tm_LNK
? TTL In
(5VT)
Link Status – (one for each Port) The polarity
of this signal is programmable via Port Configu-
ration Register
Note:
“m” is the port number [3:0].
?
These signals have programmable output polarity.
4.5 Test Facility
Symbol
Type
Name & Functions
T_MODE
CMOS
I/O TS
Test Mode Selection & Test Output – Set Test Mode upon Reset, and
provides test status output during test mode
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