參數(shù)資料
型號(hào)： MH28S72PJG-5
廠商： Mitsubishi Electric Corporation
元件分類(lèi)： 圓形連接器
英文描述： Circular Connector; Body Material:Aluminum Alloy; Series:KPSE07; No. of Contacts:19; Connector Shell Size:14; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Circular Contact Gender:Pin RoHS Compliant: No
中文描述： 9663676416位（134217728 - Word的72位）同步動(dòng)態(tài)隨機(jī)存儲(chǔ)器
文件頁(yè)數(shù)： 4/57頁(yè)
文件大小： 954K
代理商： MH28S72PJG-5
9,663,676,416-BIT ( 134,217,728-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH28S72PJG -5,-6,-7
27/Mar. /2001
MIT-DS-406-0.2
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MITSUBISHI
ELECTRIC
PIN FUNCTION
Input
Master Clock:All other inputs are referenced to the rising
edge of CK
CKE0
Input
Clock Enable:CKE controls internal clock.When CKE is
low,internal clock for the following cycle is ceased. CKE is
also used to select auto / self refresh. After self refresh
mode is started, CKE E becomes asynchronous input.Self
refresh is maintained as long as CKE is low.
/S0 - 3
Input
Chip Select: When /S is high,any command means
No Operation.
/RAS,/CAS,/W
Input
Combination of /RAS,/CAS,/W defines basic commands.
A0-11
Input
A0-12 specify the Row/Column Address in conjunction with
BA.The Row Address is specified by A0-12.The Column
Address is specified by A0-9,A11.A10 is also used to
indicate precharge option.When A10 is high at a read / write
command, an auto precharge is performed. When A10 is
high at a precharge command, both banks are precharged.
Bank Address:BA0,1 is not simply BA.BA0,1 specifies
the bank to which a command is applied.BA must be set
with ACT,PRE,READ,WRITE commands
BA0-1
Input
DQ0-63
CB0-7
Input/Output
Data In and Data out are referenced to the rising edge
of CK
DQM0-7
Input
Din Mask/Output Disable:When DQMB is high in burst
write.Din for the current cycle is masked.When DQMB is
high in burst read,Dout is disabled at the next but one cycle.
Vdd,Vss
Power SupplyPower Supply for the memory mounted module.
CK0
REGE
Output
Register enable:When REGE is low,All control signals and
address are buffered. (Buffer mode) When REGE is
high,All control and address are latched. (Latch mode)
4
相關(guān)PDF資料
PDF描述
MH28S72PJG-6 Circular Connector; Body Material:Aluminum Alloy; Series:KPSE07; No. of Contacts:19; Connector Shell Size:14; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Circular Contact Gender:Socket RoHS Compliant: No
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MH28S72PJG-6 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:9,663,676,416-BIT ( 134,217,728-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH28S72PJG-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:9,663,676,416-BIT ( 134,217,728-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH28TAD 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator
MH28TAD-R 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator
MH28TAG 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator
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