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參數(shù)資料
| 型號： | MH2S64CWXTJ-15 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM |
| 中文描述： | 134217728位（2097152字，64位）SynchronousDRAM |
| 文件頁數(shù)： | 24/45頁 |
| 文件大小： | 691K |
| 代理商： | MH2S64CWXTJ-15 |
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MH2S64CZTJ/CWZTJ-12,-15,-1539
134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( / 45 )
24
MITSUBISHI
ELECTRIC
Oct.28.1996
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0019-0.4
AUTO REFRESH
Single cycle of auto-refresh is initiated with a REFA(/CS=/RAS=/CAS=L,
/WE=/CKE=H) command. The refresh address is generated internally. 4096 REFA
cycle within 64ms refresh 16Mbit memory cells. The auto-refresh is performed on
each bank alternately(ping-pong refresh). Before performing an auto-refresh, both
banks must be in the idle state. Additional commands must not be supplied to the
device before tRC from the REFA command.
Auto-Refresh
CK
/S
/RAS
/CAS
/WE
CKE
A0-10
BA
Auto Refresh on Bank 0
Auto Refresh on Bank 1
minimum tRC
NOP or DESLECT
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MH2S64CWXTJ-1539 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM |
| MH2S64CWZTJ-12 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM |
| MH2S64CWZTJ-15 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM |
| MH2S64CWZTJ-1539 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM |
| MH2S64CZTJ-12 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:134217728-BIT (2097152-WORD BY 64-BIT)SynchronousDRAM |
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