參數(shù)資料
型號(hào): MH32S72QJA-7
廠商: Mitsubishi Electric Corporation
英文描述: 2415919104-BIT ( 33554432-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
中文描述: 2415919104位(33554432 - Word的72位)同步動(dòng)態(tài)隨機(jī)存儲(chǔ)器
文件頁(yè)數(shù): 17/56頁(yè)
文件大小: 917K
代理商: MH32S72QJA-7
2,415,919,104-BIT ( 33,554,432-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH32S72AQJA-7, -8
17/Mar./2000
MIT-DS-0371-0.2
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MITSUBISHI
ELECTRIC
BUFFER MODE
SWITCHING CHARACTERISTICS
(Ta=0 ~ 70°C, Vdd = 3.3 +/- 0.3V, Vss = 0V, unless otherwise noted)
Unit
ns
ns
ns
Limits
Symbol Parameter
-7
Min.
Max.
tAC
Access time from CK
CL=3
CL=4
6
ns
tOH
Output Hold time
from CK
Delay time, output low
impedance from CK
Delay time, output high
impedance from CK
3
tOLZ
0
tOHZ
3
6
LATCH MODE
17
-8
Min.
Max.
7
3
0
3
6
6
6
Limits
Symbol Parameter
-7
Unit
Min.
10
10
Max.
tCLK
CK cycle time
ns
ns
tCH
tCL
tT
tIS
tIH
tRC
tRCD
tRAS
tRP
tWR
tRRD
tRSC
tSRX
CK High pulse width
CK Low pilse width
Transition time of CK
Input Setup time(all inputs)
Input Hold time(all inputs)
Row cycle time
Row to Column Delay
Row Active time
Row Precharge time
Write Recovery time
Act to Act Deley time
Mode Register Set Cycle time
Self Refresh Exit time
3
3
1
7
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
70
20
50
20
20
20
20
10
100000
tPDE
tREF
Power Down Exit time
Refresh Interval time
10
64
ms
CL=2
CL=3
-8
Min.
13
10
Max.
3
3
1
7
0
10
70
20
50
20
20
20
20
10
100000
10
64
Note)
1 If clock rising time is longer than 1ns,(tT/2-0.5)ns should be added to parameter.
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