參數(shù)資料
型號： MH4S64BBKG-7
廠商： Mitsubishi Electric Corporation
英文描述： 268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
中文描述： 268435456位（4194304 -文字，64位）SynchronousDRAM
文件頁數(shù)： 21/55頁
文件大?。?/td> 586K
代理商： MH4S64BBKG-7
MH4S64BLG -7,-8,-10
268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( / 55 )
21
MITSUBISHI
ELECTRIC
29.Oct.1998
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0227-0.5
[ Read Interrupted by Precharge ]
Burst read operation can be interrupted by precharge of the same or the other bank. Read
to PRE interval is minimum 1 CK. A PRE command output disable latency is equivalent to
the /CAS Latency.As a result, READ to PRE interval determines valid data length to be
output.The figure below shows examples of BL=4.
Read Interrupted by Precharge (BL=4)
CK
Command
DQ
READ
PRE
Q0
Q1
Command
DQ
READ
PRE
Q0
Q1
Command
DQ
READ
PRE
Q0
Q2
Q1
Command
DQ
READ
PRE
Q0
Q1
Q2
CL=3
CL=2
Command
DQ
READ PRE
Q0
Command
DQ
READ PRE
Q0
相關(guān)PDF資料
PDF描述
MH4S64BBKG-7L 268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MH4S64BBKG-8 268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MH4S64DBKG-7 268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MH4S64DBKG-7L 268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MH4S64DBKG-8 CAP USE W/ SERU AU OA BRN
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MH4S64BBKG-7L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MH4S64BBKG-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MH4S64BBKG-8L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MH4S64BKG-10 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MH4S64BKG-10L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
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