參數(shù)資料
型號: MH4S64CBMD-15
廠商: Mitsubishi Electric Corporation
英文描述: 268435456-BIT (4194304-WORD BY 64-BIT)SynchronousDRAM
中文描述: 268435456位(4194304字,64位)SynchronousDRAM
文件頁數(shù): 27/55頁
文件大?。?/td> 586K
代理商: MH4S64CBMD-15
MH4S64BLG -7,-8,-10
268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( 27
MITSUBISHI
ELECTRIC
29.Oct.1998
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0227-0.5
CLK SUSPEND
CKE controls the internal CLK at the following cycle. Figure below shows how CKE
works. By negating CKE, the next internal CLK is suspended. The purpose of CLK
suspend is power down, output suspend or input suspend. CKE is a synchronous
input except during the self-refresh mode. CLK suspend can be performed either
when the banks are active or idle, A command at the following cycle is ignored.
ext.CLK
CKE
int.CLK
Power Down by CKE
CK
Command
PRE
CKE
Command
CKE
ACT
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
Standby Power Down
Active Power Down
NOP
NOP
DQ Suspend by CKE
CK
Command
DQ
Write
D0
D1
D2
D3
CKE
READ
Q0
Q1
Q2
Q3
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