參數(shù)資料
型號: MH64S72QJA-7
廠商: Mitsubishi Electric Corporation
英文描述: 4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
中文描述: 4831838208位(67108864 - Word的72位)同步動態(tài)隨機存儲器
文件頁數(shù): 18/56頁
文件大小: 936K
代理商: MH64S72QJA-7
4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH64S72AWJA -6,-7,-8
17/Mar. /2000
MIT-DS-372-0.2
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MITSUBISHI
ELECTRIC
1.4V
1.4V
DQ
CK
tAC
tOH
tOHZ
Output Load Condition
DQ
CK
Output Timing
Measurement
Reference Point
1.4V
1.4V
BUFFER MODE
18
Note)
1 If clock rising time is longer than 1ns,(tT/2-0.5)ns should be added to parameter.
Limits
-7
Min.
Symbol Parameter
-8
Unit
Min.
Max.
tAC
Access time from CK
7
ns
tOH
Output Hold time
from CK
3
ns
tOLZ
Delay time, output low
impedance from CK
Delay time, output high
impedance from CK
0
ns
tOHZ
3
ns
6
6
3
0
3
6
Max.
6
6
ns
CL=2
CL=3
-6
Min.
6
3
0
2.7
5.4
Max.
5.4
CL=2
3
ns
3
2.7
CL=3
V
OUT
50pF
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