參數(shù)資料
型號: MH64S72QJA-8
廠商: Mitsubishi Electric Corporation
英文描述: 4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
中文描述: 4831838208位(67108864 - Word的72位)同步動態(tài)隨機(jī)存儲器
文件頁數(shù): 1/56頁
文件大小: 936K
代理商: MH64S72QJA-8
4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH64S72AWJA -6,-7,-8
17/Mar. /2000
MIT-DS-372-0.2
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MITSUBISHI
ELECTRIC
DESCRIPTION
APPLICATION
Main memory unit for computers, Microcomputer memory.
FEATURES
Utilizes industry standard 32M X 4 Synchronous DRAMs in
smal TSOP package , industry standard Resister in TSSOP
package , and industry standard PLL in TSSOP package.
Single 3.3V +/- 0.3V supply
Burst length 1/2/4/8/Full Page (programmable)
Burst type sequential / interleave (programmable)
Column access random
Burst W rite / Single Write (programmable)
Auto precharge / Auto bank precharge controlled by A10
Auto refresh and Self refresh
LVTTL Interface
4096 refresh cycles every 64ms
1
1pin
10pin
11pin
40pin
41pin
84pin
85pin
94pin
95pin
124pin
125pin
168pin
The MH64S72AWJA is 67108864 - word x 72-bit
Synchronous DRAM module. This consist of thirty-six
industry standard 32M x 4 Synchronous DRAMs in
smalTSOP.
The smal TSOP on a card edge dual in-line package
provides any application where high densities and large
of quantities memory are required.
This is a socket-type memory module ,suitable for
easy interchange or addition of module.
Frequency
CLK Access Time
(at Latch mode)
5.4ns(CL=4)
-8
100MHz
6.0ns(CL=3)
6.0ns(CL=4)
100MHz
-7
133MHz
-6
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