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參數(shù)資料
| 型號： | MH64S72VJG-5 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM |
| 中文描述： | 4831838208位（67108864 - Word的72位）同步動態(tài)隨機(jī)存儲器 |
| 文件頁數(shù)： | 7/56頁 |
| 文件大小： | 936K |
| 代理商： | MH64S72VJG-5 |
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4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH64S72AWJA -6,-7,-8
17/Mar. /2000
MIT-DS-372-0.2
Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MITSUBISHI
ELECTRIC
7
Current State
IDLE
/S
H
L
L
L
L
L
L
/RAS
X
H
H
H
L
L
L
/CAS
X
H
H
L
H
H
L
/WE
X
H
L
X
H
L
H
Address
Command
DESEL
NOP
Action
X
X
NOP
NOP
BA
BA,CA,A10
TBST
ILLEGAL*2
READ/WRITE ILLEGAL*2
ACT
PRE/PREA
REFA
BA,RA
BA,A10
X
Op-Code,
Mode-Add
X
X
BA
Bank Active,Latch RA
NOP*4
Auto-Refresh*5
L
L
L
L
MRS
Mode Register Set*5
ROW ACTIVE
H
L
L
X
H
H
X
H
H
X
H
L
DESEL
NOP
NOP
NOP
NOP
Begin Read,Latch CA,
Determine Auto-Precharge
Begin Write,Latch CA,
Determine Auto-Precharge
Bank Active/ILLEGAL*2
Precharge/Precharge All
ILLEGAL
TBST
L
H
L
H
BA,CA,A10
READ/READA
L
H
L
L
BA,CA,A10
WRITE/
WRITEA
ACT
PRE/PREA
REFA
L
L
L
L
L
L
H
H
L
H
L
H
BA,RA
BA,A10
X
Op-Code,
Mode-Add
X
X
L
L
L
L
MRS
ILLEGAL
READ
H
L
L
X
H
H
X
H
H
X
H
L
DESEL
NOP
TBST
NOP(Continue Burst to END)
NOP(Continue Burst to END)
Terminate Burst
Terminate Burst,Latch CA,
Begin New Read,Determine
Auto-Precharge*3
Terminate Burst,Latch CA,
Begin Write,Determine Auto-
Precharge*3
Bank Active/ILLEGAL*2
Terminate Burst,Precharge
ILLEGAL
BA
L
H
L
H
BA,CA,A10
READ/READA
L
H
L
L
BA,CA,A10 WRITE/WRITEA
L
L
L
L
L
L
H
H
L
H
L
H
BA,RA
BA,A10
X
Op-Code,
Mode-Add
ACT
PRE/PREA
REFA
L
L
L
L
MRS
ILLEGAL
FUNCTION TRUTH TABLE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MH64S72VJG-6 | 4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM |
| MH64S72QJA-6 | 4,831,838,208-BIT ( 64,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM |
| MH64S72QJA-7 | 4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM |
| MH64S72QJA-8 | 4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM |
| MH8S64PHC-7 | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MH64S72VJG-6 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM |
| MH64TAD | 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator |
| MH64TAD-R | 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator |
| MH64TAG | 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator |
| MH64TAG-R | 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator |
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