參數(shù)資料
型號: MH8S64DALD-7
廠商: Mitsubishi Electric Corporation
英文描述: 536870912-BIT (8388608 - WORD BY 64-BIT)Synchronous DRAM
中文描述: 536870912位(8388608 -文字,64位)同步DRAM
文件頁數(shù): 46/55頁
文件大?。?/td> 588K
代理商: MH8S64DALD-7
MH8S64PHC -7,-8,-10
536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( / 55 )
46
MITSUBISHI
ELECTRIC
9/ Dec. /1998
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0282-0.0
Read Interrupted by Precharge @BL=4 CL=3
/CS
/RAS
/CAS
/WE
CKE
BA0,1
DQ
X
X
X
0
Y
0
Q0
Q0
Q0
ACT#0
READ#0
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
tRCD
Y
1
PRE#1
CLK
X
X
X
1
tRRD
Q1
Q1
ACT#1
PRE#0
Q0
DQM read latency=2
1
Y
1
Burst Read is not interrupted
by Precharge of the other bank.
0
X
X
X
1
tRCD
tRP
READ#1
ACT#1
READ#1
Burst Read is interrupted
by Precharge of the same bank.
Italic parameter
indicates minimum case
A0-8
A10
DQM
A9,11
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