參數(shù)資料
型號(hào)： MH8S72DALD-8
廠商： Mitsubishi Electric Corporation
英文描述： 603979776-BIT (8388608 - WORD BY 72-BIT)Synchronous DRAM
中文描述： 603979776位（8388608 - Word的72位）同步DRAM
文件頁(yè)數(shù)： 6/56頁(yè)
文件大?。?/td> 732K
代理商： MH8S72DALD-8
MITSUBISHI
ELECTRIC
603,979,776-BIT ( 8,388,608-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH8S72BAFD -7, -8
MITSUBISHI LSIs
PIN FUNCTION
Preliminary
Spec.
1/ Dec./1998
MIT-DS-0273-0.2
Input
Master Clock:All other inputs are referenced to the rising
edge of CK
CKE0
Input
Clock Enable:CKE controls internal clock.When CKE is
low,internal clock for the following cycle is ceased. CKE is
also used to select auto / self refresh. After self refresh
mode is started, CKE E becomes asynchronous input.Self
refresh is maintained as long as CKE is low.
/S0,2
Input
Chip Select: When /S is high,any command means
No Operation.
/RAS,/CAS,/W
Input
Combination of /RAS,/CAS,/W defines basic commands.
A0-11
Input
A0-11 specify the Row/Column Address in conjunction with
BA.The Row Address is specified by A0-11.The Column
Address is specified by A0-9.A10 is also used to indicate
precharge option.When A10 is high at a read / write
command, an auto precharge is performed. When A10 is
high at a precharge command, both banks are precharged.
BA0-1
Input
Bank Address:BA0,1 is not simply BA.BA0,1 specifies
the bank to which a command is applied.BA must be set
with ACT,PRE,READ,WRITE commands
DQ0-63
CB0-7
Input/Output
Data In and Data out are referenced to the rising edge of
CK
DQM0-7
Input
Din Mask/Output Disable:When DQMB is high in burst
write.Din for the current cycle is masked.When DQMB is high
in burst read,Dout is disabled at the next but one cycle.
Vdd,Vss
Power Supply Power Supply for the memory mounted module.
CK0
REGE
Output
Register enable:When REGE is low,All control signals and
address are buffered. (Buffer mode) When REGE is
high,All control and address are latched. (Latch mode)
6
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MH8S72DBFD-7 603,979,776-BIT ( 8,388,608-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MH8S72DBFD-7 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:603,979,776-BIT ( 8,388,608-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH8S72DBFD-8 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:603,979,776-BIT ( 8,388,608-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH8S72DCFD-6 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:603,979,776-BIT ( 8,388,608-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH8S72PHC-10 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:603979776-BIT (8388608 - WORD BY 72-BIT)SynchronousDRAM
MH8S72PHC-7 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:603979776-BIT (8388608 - WORD BY 72-BIT)SynchronousDRAM
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