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參數(shù)資料
| 型號： | MIC2593-5BTQ |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Dual-Slot PCI Hot Plug Controller |
| 中文描述： | 雙插槽的PCI熱插拔控制器 |
| 文件頁數(shù)： | 19/26頁 |
| 文件大?。?/td> | 170K |
| 代理商： | MIC2593-5BTQ |
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April 2004
19
M9999-042204
MIC2593
Micrel
Status Register Slot B (STATB)
8-Bits, Read-Only
Status Register, Slot B (STATB)
D[5]
D[4]
read-only
read/write
VAUXB
VAUXBF
D[7]
D[6]
D[3]
D[2]
D[1]
D[0]
read-only
FAULTB
read-only
MAINB
read/write
12MVBF
read/write
12VBF
read/write
5VBF
read/write
3VBF
Bit(s)
FAULTB
Function
Operation
FAULT Pin Status
–
Slot B
1 = /FAULTB pin asserted
(/FAULTB pin is LOW)
0 = /FAULTB pin de-asserted
(/FAULTB pin is HIGH)
See Notes 1 and 2
Represents the actual state (on/off) of the
four Main Power outputs for Slot B
(+12V,
–
12V, +5V and +3.3V)
1 = MAIN Power ON
0 = MAIN Power OFF
Represents the actual state (on/off) of the
Auxiliary Power output for Slot B
1 = AUX Power ON
0 = AUX Power OFF
1 = Fault 0 = No fault
1 = Fault 0 = No fault
1 = Fault 0 = No fault
1 = Fault 0 = No fault
1 = Fault 0 = No fault
MAINB
MAIN Enable Status
–
Slot B
VAUXB
VAUX Enable Status
–
Slot B
VAUXBF
12VMBF
12VBF
5VBF
3VBF
Overcurrent Fault: VAUXB supply B
Overcurrent Fault:
–
12V supply B
Overcurrent Fault: +12V supply B
Overcurrent Fault: 5V supply B
Overcurrent Fault: 3.3V supply B
Power-Up Default Value: 0000 0000
b
= 00
h
Command_Byte Value (R/W): 0000 0101
b
= 05
h
The power-up default value is 00
h
. Both slots are disabled upon power-up, i.e., all supply outputs are off. In response to an
overcurrent fault condition, writing a logical 1 back into the active (or set) bit position will clear the bit and de-assert /INT. The
status of the /FAULTB pin is not affected by reading the Status Register or by clearing active status bits.
Notes:
1.
If FAULTB has been set by an overcurrent condition on one or more of the MAIN outputs, the ONB input must go LOW to reset FAULTB.
If FAULTB has been set by a VAUXB overcurrent event, the AUXENB input must go LOW to reset FAULTB.
If an overcurrent has occurred on both a MAIN output and the VAUX output of slot B, both ONB and AUXENB of the slot must go low to reset
FAULTB.
Neither the FAULTB bit nor the /FAULTB pin is active when the MIC2593 power paths are controlled by the System Management Interface. When
using SMI power path control, the AUXENB and ONB pins for that slot must be tied to GND.
2.
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