MK2042-01
Communications Clock Monitor
MDS 2042-01
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126 (408)295-9800tel www.icst.com
4
Revision 102600
Printed 11/15/00
ICRO
C
LOC K
ADVANCE INFORMATION
The MK2042-01 internal Clock Loss Detector compares the REFIN clock to the INA clock to determine
when the INA clock is no longer present. During normal operation, the Detector is reset with each rising
edge of the INA clock, and the NO_INA output will remain low. In a fault condition where the INA
clock is removed, the Detector will use the REFIN clock to wait the pre-determined number of REFIN
clock pulses (set by S2:S0 per the table on page 2), and will then force the NO_INA output to a high level.
The NO_INA signal can be used to notify the system that the input clock has been lost, or it can provide
automatic switchover to INB. Automatic switchover to INB is achieved by connecting NO_INA to the
SELB input, as illustrated in Figure 1. In this case the MK2042-01 will automatically switch CLKOUT to
the INB input when the loss of INA is detected. With this configuration, when INA becomes active again,
NO_INA will go low and the MK2042-01 will switch CLKOUT to INA. Since the Clock Loss Detector
will set NO_INA low as soon as an INA clock edge occurs, sporadic edges on INA could cause CLKOUT
to switch unpredictably between INA and INB. Because of this, external system control of SELB is best in
cases where the INA clock is sporadic.
Note that proper operation of the Clock Loss Detector requires that there always be a clock on REFIN.
The REFIN clock does not need to be the same frequency as the INA clock. Because the REFIN clock and
the INA clock are asynchronous, the Clock Loss Detector Count shown in the table on page 2 has a
tolerance of -0/+1 REFIN clock edges.
DETECTING CLOCK LOSS