參數(shù)資料
型號(hào)： MK40N512VLL100
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, LQFP-100
文件頁(yè)數(shù)： 27/63頁(yè)
文件大?。?/td> 1735K
代理商： MK40N512VLL100
Table 23. 16-bit ADC operating conditions (continued)
Symbol
Description
Conditions
Min.
Max.
Unit
Notes
Crate
ADC conversion
rate
16 bit modes
No ADC hardware
averaging
Continuous
conversions enabled
Peripheral clock =
50MHz
37.037
—
361.402
Ksps
1. Typical values assume VDDA = 3.0 V, Temp = 25°C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
2. DC potential difference.
3. This resistance is external to MCU. The analog source resistance should be kept as low as possible in order to achieve the
best results. The results in this datasheet were derived from a system which has <8 Ω analog source resistance. The RAS/
CAS time constant should be kept to <1ns.
4. In order to use the maximum ADC conversion clock frequency ADHSC bit should be set and the ADLPC should be clear.
5. In order to use the maximum ADC conversion clock frequency ADHSC bit should be set and the ADLPC should be clear.
6. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http://
cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1
7. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http://
cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1
RAS
VAS
CAS
ZAS
VADIN
ZADIN
RADIN
CADIN
Pad
leakage
due to
input
protection
INPUT PIN
SIMPLIFIED
INPUT PIN EQUIVALENT
CIRCUIT
SIMPLIFIED
CHANNEL SELECT
CIRCUIT
ADC SAR
ENGINE
Figure 10. ADC input impedance equivalency diagram
Peripheral operating requirements and behaviors
K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
33
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