
ML4426
CAT
CAT
FB A
FB B
FB C
BACK
EMF
SAMPLER
CRT
CRT
CRR
–
+
1.5V
750nA
–
+
1.5V
750nA
VDD
VDD
CRR
500nA
VDD
SPEED
FB
TO
SPEED FB
FILTER
CVCO
RVCO
VOLTAGE
CONTROLLED
OSCILLATOR
VCO/TACH
TO RESET INPUT
OF COMMUTATION
STATE MACHINE
Run Mode (Back EMF Sensing)
At the end of ramp mode the controller goes into run
mode. In run mode, the back EMF sensing is enabled and
commutation is now under the control of the phase locked
loop. Motor speed is now regulated by the speed control
loop.
PWM SPEED CONTROL
Speed control is accomplished by setting a speed
command at SPEED SET with an input voltage from 0 to
6.9V (V
REF
). The accuracy of the speed command is
determined by the external components R
VCO
and C
VCO
.
There are a number of methods that can be used to control
the speed command of the ML4426. One is to use a 10k
W
potentiometer from V
REF
to ground with the wiper
connected to SPEED SET. If SPEED SET is controlled from
a microcontroller, one of its DACs can be used with V
REF
as its input reference.
The speed command is compared with the sensed speed
from SPEED FB through a transconductance error
amplifier. The output of the speed error amplifier is SPEED
COMP. SPEED COMP is clamped between one diode drop
above 3.9V (approximately 4.6V) and one diode drop
below 1.7V (approximately 1V) to prevent speed loop
“wind-up”. Speed loop compensation components are
connected to this pin as shown in Figure 9. The speed loop
compensation components are calculated as follows:
N
V
SC
SB
e
25 98696
.
.
10
2
p
C
C
f
K
m
f
MOTOR
VCO
2
SB
=
269
2
.
t
(9a)
R
f
C
SC
SB
SC
=
(9b)
Where f
SB
is the speed loop bandwidth in Hz.
Figure 8. ML4426 Start-up Circuitry for Controlling the Align and Ramp Times
–
+
+
–
SPEED SET
SPEED COMP
3.9V
1.7V
10k
20kHz
PWM ON/OFF
FROM ILIMIT
ONE-SHOT
FROM
SPEED FB
TO
GATING
LOGIC &
OUTPUT
DRIVERS
CT
CT
CSC
RSC
1.7V
VREF
The voltage on SPEED COMP is compared with a ramp
oscillator to create a PWM duty cycle. The PWM ramp
oscillator creates a sawtooth function from 1.7V to 3.9V
as shown in Figure 9. A negative clamp at one diode drop
below 1.7V (approximately 1V) starts the oscillator on
power up. The frequency of the ramp oscillator is set by a
capacitor to ground C
IOS
and is selected using the
following equation:
C
f
A
V
T
PWM
=
1
50
24
.
m
(10)
Where f
PWM
is the PWM frequency in Hz. The PWM duty
cycle from the speed control loop is gated the current
limit one shot that controls the LA, LB, and LC output
drivers.
Figure 9. Speed Control Loop Component Connections
REV. 1.0 10/10/2000
11