
ML4426
REV. 1.0 10/10/2000
3
PIN
NAME
FUNCTION
1(30)
I
SENSE
Motor current sense input. When
I
SENSE
exceeds 0.2
I
LIMIT,
the
output drivers LA, LB, and LC are
shut off for a fixed time
determined by C
IOS
2(31)
HA
Active low output driver for the
phase A high-side switch
3(32)
HB
Active low output driver for the
phase B high-side switch
4(1)
HC
Active low output driver for the
phase C high-side switch
5(3)
SPEED COMP Speed control loop compensation is
set by a series resistor and capacitor
from SPEED COMP to GND
6(4)
C
T
A capacitor from C
T
to GND sets
the PWM oscillator frequency
7(5)
V
REF
6.9V reference voltage output
8(6)
SPEED SET
Speed loop input which ranges
from 0 (stopped) to V
REF
(maximum speed)
9(7)
LA
Active high output driver for the
phase A low-side switch
10(8)
LB
Active high output driver for the
phase B low-side switch
11(9)
LC
Active high output driver for the
phase C low-side switch
12(10) F/
R
This TTL level input selects the
direction of the motor by changing
the sequence of the commutation
state machine
13(11) VCO/TACH
This TTL level output corresponds
to the signal used to clock the
commutation state machine. The
output frequency is proportional to
the motor speed when the back-
EMF sensing loop is locked onto
the rotor position
14(12) V
DD
12V power supply input
15(15) C
VCO
A capacitor to GND sets the
voltage-to-frequency ratio of the
VCO
16(16) R
VCO
An resistor to GND sets up a
current proportional to the input
voltage of the VCO
PIN
NAME
FUNCTION
17(17) C
AT
A capacitor to GND sets the time
that the controller stays in the
align mode
18(18)
UV FAULT
This output goes low when V
DD
drops below the UVLO threshold,
and indicates that all output
drivers have been disabled
19(19) C
RT
A capacitor to GND sets the time
that the controller stays in the
ramp mode
20(20) SPEED FB
Output of the back-EMF sampling
circuit and input to the VCO. An
RC network connected to SPEED
FB sets the compensation for the
PLL loop formed by the back-EMF
sampling circuit, the VCO, and
the commutation state machine
21(21) C
RR
A capacitor to between C
RR
and
SPEED FB sets the ramp rate
(acceleration) of the motor when
the controller is in ramp mode
22(22) FB A
The motor feedback voltage from
phase A is monitored through a
resistor divider for back-EMF
sensing at this pin
23(23) FB B
The motor feedback voltage from
phase B is monitored through a
resistor divider for back-EMF
sensing at this pin
24(24) FB C
The motor feedback voltage from
phase C is monitored through a
resistor divider for back-EMF
sensing at this pin
25(25)
BRAKE
A logic low input activates motor
braking by shutting off the high-
side output drivers and turning on
the low-side output drivers
26(26) C
IOS
A capacitor to GND sets the time
that the low-side output drivers
remain off after I
SENSE
exceeds its
threshold
27(27) R
REF
An 137k
resistor to GND sets a
current proportional to V
REF
that is
used to set all the internal bias
currents except for the VCO
28(28) GND
Signal and power ground
PIN DESCRIPTION
(Pin number in parenthesis is for TQFP package)